ARM: dts: stm32: Use clock DT binding definition on stm32f429 family
authorGabriel Fernandez <gabriel.fernandez@st.com>
Wed, 1 Feb 2017 15:16:27 +0000 (16:16 +0100)
committerAlexandre TORGUE <alexandre.torgue@st.com>
Wed, 1 Feb 2017 16:01:39 +0000 (17:01 +0100)
This patch uses clock DT binding definition instead numerical values
for stm32f429 board.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
arch/arm/boot/dts/stm32429i-eval.dts
arch/arm/boot/dts/stm32f429.dtsi

index eedb27d..9ed28ec 100644 (file)
        usbotg_hs_phy: usbphy {
                #phy-cells = <0>;
                compatible = "usb-nop-xceiv";
-               clocks = <&rcc 0 30>;
+               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHSULPI)>;
                clock-names = "main_clk";
        };
 };
index 07979d0..3f441fb 100644 (file)
@@ -49,6 +49,7 @@
 #include "armv7-m.dtsi"
 #include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
 #include <dt-bindings/clock/stm32fx-clock.h>
+#include <dt-bindings/mfd/stm32f4-rcc.h>
 
 / {
        clocks {
@@ -82,7 +83,7 @@
                        compatible = "st,stm32-timer";
                        reg = <0x40000000 0x400>;
                        interrupts = <28>;
-                       clocks = <&rcc 0 128>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
                        status = "disabled";
                };
 
@@ -91,7 +92,7 @@
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40000000 0x400>;
-                       clocks = <&rcc 0 128>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
                        clock-names = "int";
                        status = "disabled";
 
                        compatible = "st,stm32-timer";
                        reg = <0x40000400 0x400>;
                        interrupts = <29>;
-                       clocks = <&rcc 0 129>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40000400 0x400>;
-                       clocks = <&rcc 0 129>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
                        clock-names = "int";
                        status = "disabled";
 
                        compatible = "st,stm32-timer";
                        reg = <0x40000800 0x400>;
                        interrupts = <30>;
-                       clocks = <&rcc 0 130>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40000800 0x400>;
-                       clocks = <&rcc 0 130>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
                        clock-names = "int";
                        status = "disabled";
 
                        compatible = "st,stm32-timer";
                        reg = <0x40000c00 0x400>;
                        interrupts = <50>;
-                       clocks = <&rcc 0 131>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
                };
 
                timers5: timers@40000c00 {
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40000C00 0x400>;
-                       clocks = <&rcc 0 131>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
                        clock-names = "int";
                        status = "disabled";
 
                        compatible = "st,stm32-timer";
                        reg = <0x40001000 0x400>;
                        interrupts = <54>;
-                       clocks = <&rcc 0 132>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001000 0x400>;
-                       clocks = <&rcc 0 132>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
                        clock-names = "int";
                        status = "disabled";
 
                        compatible = "st,stm32-timer";
                        reg = <0x40001400 0x400>;
                        interrupts = <55>;
-                       clocks = <&rcc 0 133>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001400 0x400>;
-                       clocks = <&rcc 0 133>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>;
                        clock-names = "int";
                        status = "disabled";
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001800 0x400>;
-                       clocks = <&rcc 0 134>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM12)>;
                        clock-names = "int";
                        status = "disabled";
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001C00 0x400>;
-                       clocks = <&rcc 0 135>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
                        clock-names = "int";
                        status = "disabled";
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40002000 0x400>;
-                       clocks = <&rcc 0 136>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
                        clock-names = "int";
                        status = "disabled";
 
                        compatible = "st,stm32-usart", "st,stm32-uart";
                        reg = <0x40004400 0x400>;
                        interrupts = <38>;
-                       clocks =  <&rcc 0 145>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART2)>;
                        status = "disabled";
                };
 
                        compatible = "st,stm32-usart", "st,stm32-uart";
                        reg = <0x40004800 0x400>;
                        interrupts = <39>;
-                       clocks = <&rcc 0 146>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART3)>;
                        status = "disabled";
                        dmas = <&dma1 1 4 0x400 0x0>,
                               <&dma1 3 4 0x400 0x0>;
                        compatible = "st,stm32-uart";
                        reg = <0x40004c00 0x400>;
                        interrupts = <52>;
-                       clocks = <&rcc 0 147>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART4)>;
                        status = "disabled";
                };
 
                        compatible = "st,stm32-uart";
                        reg = <0x40005000 0x400>;
                        interrupts = <53>;
-                       clocks = <&rcc 0 148>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART5)>;
                        status = "disabled";
                };
 
                        compatible = "st,stm32-usart", "st,stm32-uart";
                        reg = <0x40007800 0x400>;
                        interrupts = <82>;
-                       clocks = <&rcc 0 158>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART7)>;
                        status = "disabled";
                };
 
                        compatible = "st,stm32-usart", "st,stm32-uart";
                        reg = <0x40007c00 0x400>;
                        interrupts = <83>;
-                       clocks = <&rcc 0 159>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART8)>;
                        status = "disabled";
                };
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40010000 0x400>;
-                       clocks = <&rcc 0 160>;
+                       clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM1)>;
                        clock-names = "int";
                        status = "disabled";
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40010400 0x400>;
-                       clocks = <&rcc 0 161>;
+                       clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM8)>;
                        clock-names = "int";
                        status = "disabled";
 
                        compatible = "st,stm32-usart", "st,stm32-uart";
                        reg = <0x40011000 0x400>;
                        interrupts = <37>;
-                       clocks = <&rcc 0 164>;
+                       clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART1)>;
                        status = "disabled";
                        dmas = <&dma2 2 4 0x400 0x0>,
                               <&dma2 7 4 0x400 0x0>;
                        compatible = "st,stm32-usart", "st,stm32-uart";
                        reg = <0x40011400 0x400>;
                        interrupts = <71>;
-                       clocks = <&rcc 0 165>;
+                       clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART6)>;
                        status = "disabled";
                };
 
                        compatible = "st,stm32f4-adc-core";
                        reg = <0x40012000 0x400>;
                        interrupts = <18>;
-                       clocks = <&rcc 0 168>;
+                       clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC1)>;
                        clock-names = "adc";
                        interrupt-controller;
                        #interrupt-cells = <1>;
                                compatible = "st,stm32f4-adc";
                                #io-channel-cells = <1>;
                                reg = <0x0>;
-                               clocks = <&rcc 0 168>;
+                               clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC1)>;
                                interrupt-parent = <&adc>;
                                interrupts = <0>;
                                status = "disabled";
                                compatible = "st,stm32f4-adc";
                                #io-channel-cells = <1>;
                                reg = <0x100>;
-                               clocks = <&rcc 0 169>;
+                               clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC2)>;
                                interrupt-parent = <&adc>;
                                interrupts = <1>;
                                status = "disabled";
                                compatible = "st,stm32f4-adc";
                                #io-channel-cells = <1>;
                                reg = <0x200>;
-                               clocks = <&rcc 0 170>;
+                               clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC3)>;
                                interrupt-parent = <&adc>;
                                interrupts = <2>;
                                status = "disabled";
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014000 0x400>;
-                       clocks = <&rcc 0 176>;
+                       clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM9)>;
                        clock-names = "int";
                        status = "disabled";
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014400 0x400>;
-                       clocks = <&rcc 0 177>;
+                       clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
                        clock-names = "int";
                        status = "disabled";
 
                        #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014800 0x400>;
-                       clocks = <&rcc 0 178>;
+                       clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
                        clock-names = "int";
                        status = "disabled";
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x0 0x400>;
-                               clocks = <&rcc 0 0>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>;
                                st,bank-name = "GPIOA";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x400 0x400>;
-                               clocks = <&rcc 0 1>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>;
                                st,bank-name = "GPIOB";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x800 0x400>;
-                               clocks = <&rcc 0 2>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>;
                                st,bank-name = "GPIOC";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0xc00 0x400>;
-                               clocks = <&rcc 0 3>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOD)>;
                                st,bank-name = "GPIOD";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x1000 0x400>;
-                               clocks = <&rcc 0 4>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOE)>;
                                st,bank-name = "GPIOE";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x1400 0x400>;
-                               clocks = <&rcc 0 5>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOF)>;
                                st,bank-name = "GPIOF";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x1800 0x400>;
-                               clocks = <&rcc 0 6>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOG)>;
                                st,bank-name = "GPIOG";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x1c00 0x400>;
-                               clocks = <&rcc 0 7>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOH)>;
                                st,bank-name = "GPIOH";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x2000 0x400>;
-                               clocks = <&rcc 0 8>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOI)>;
                                st,bank-name = "GPIOI";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x2400 0x400>;
-                               clocks = <&rcc 0 9>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOJ)>;
                                st,bank-name = "GPIOJ";
                        };
 
                                gpio-controller;
                                #gpio-cells = <2>;
                                reg = <0x2800 0x400>;
-                               clocks = <&rcc 0 10>;
+                               clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOK)>;
                                st,bank-name = "GPIOK";
                        };
 
                                     <16>,
                                     <17>,
                                     <47>;
-                       clocks = <&rcc 0 21>;
+                       clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA1)>;
                        #dma-cells = <4>;
                };
 
                                     <68>,
                                     <69>,
                                     <70>;
-                       clocks = <&rcc 0 22>;
+                       clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2)>;
                        #dma-cells = <4>;
                        st,mem2mem;
                };
                        interrupts = <61>;
                        interrupt-names = "macirq";
                        clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
-                       clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
+                       clocks = <&rcc 0 STM32F4_AHB1_CLOCK(ETHMAC)>,
+                                       <&rcc 0 STM32F4_AHB1_CLOCK(ETHMACTX)>,
+                                       <&rcc 0 STM32F4_AHB1_CLOCK(ETHMACRX)>;
                        st,syscon = <&syscfg 0x4>;
                        snps,pbl = <8>;
                        snps,mixed-burst;
                        compatible = "snps,dwc2";
                        reg = <0x40040000 0x40000>;
                        interrupts = <77>;
-                       clocks = <&rcc 0 29>;
+                       clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHS)>;
                        clock-names = "otg";
                        status = "disabled";
                };
                        compatible = "st,stm32-rng";
                        reg = <0x50060800 0x400>;
                        interrupts = <80>;
-                       clocks = <&rcc 0 38>;
+                       clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;
+
                };
        };
 };
 
 &systick {
-       clocks = <&rcc 1 0>;
+       clocks = <&rcc 1 SYSTICK>;
        status = "okay";
 };