drm/exynos: control blending of mixer graphic layer 0

The mixer graphic layer 0 isn't blended as default by commit
0377f4ed9f1aed30292c4e3c87f24e028ae26f36(drm/exynos: Don't blend mixer
layer 0). But it needs to be blended with graphic layer 0 if video layer
is enabled by vp because video layer is bottom.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 6756d1c..e8b4ec8 100644 (file)
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -365,6 +365,11 @@ static void mixer_cfg_layer(struct mixer_context *ctx, int win, bool enable)
                        vp_reg_writemask(res, VP_ENABLE, val, VP_ENABLE_ON);
                        mixer_reg_writemask(res, MXR_CFG, val,
                                MXR_CFG_VP_ENABLE);
+
+                       /* control blending of graphic layer 0 */
+                       mixer_reg_writemask(res, MXR_GRAPHIC_CFG(0), val,
+                                       MXR_GRP_CFG_BLEND_PRE_MUL |
+                                       MXR_GRP_CFG_PIXEL_BLEND_EN);
                }
                break;
        }