ARM: EXYNOS: change the value of EXYNOS4X12_ISP_LOWPWR

This patch is to fix the value of EXYNOS4X12_ISP_LOWPWR register
to zero at AFTR mode. It ensure the sub selection mux of mcuisp400
and isp200 reset a default position after power down

Signed-off-by: Younghwan Joo <yhwan.joo@samsung.com>
Signed-off-by: JaeYong Shin <jy2.shin@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 97d6885..21cef18 100644 (file)
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -140,7 +140,7 @@ static struct exynos_pmu_conf exynos4x12_pmu_config[] = {
        { S5P_CMU_RESET_MFC_LOWPWR,             { 0x1, 0x0, 0x0 } },
        { S5P_CMU_RESET_G3D_LOWPWR,             { 0x1, 0x0, 0x0 } },
        { S5P_CMU_RESET_LCD0_LOWPWR,            { 0x1, 0x0, 0x0 } },
-       { S5P_CMU_RESET_ISP_LOWPWR,             { 0x1, 0x0, 0x0 } },
+       { S5P_CMU_RESET_ISP_LOWPWR,             { 0x0, 0x0, 0x0 } },
        { S5P_CMU_RESET_MAUDIO_LOWPWR,          { 0x1, 0x1, 0x0 } },
        { S5P_CMU_RESET_GPS_LOWPWR,             { 0x1, 0x0, 0x0 } },
        { S5P_TOP_BUS_LOWPWR,                   { 0x3, 0x0, 0x0 } },