MIPS: Loongson: Remove pointless sample_lock from oprofile code.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c
index f7f9a32c722a4f062db8908b576e53530c4fb52b..29e2326b62577b3d2f6c5ae2a2620ce0e532d731 100644 (file)
--- a/arch/mips/oprofile/op_model_loongson2.c
+++ b/arch/mips/oprofile/op_model_loongson2.c
@@ -47,8 +47,6 @@ static struct loongson2_register_config {
        int cnt1_enabled, cnt2_enabled;
 } reg;
 
-static DEFINE_SPINLOCK(sample_lock);
-
 static char *oprofid = "LoongsonPerf";
 static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
 /* Compute all of the registers in preparation for enabling profiling.  */
@@ -115,7 +113,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
        uint64_t counter, counter1, counter2;
        struct pt_regs *regs = get_irq_regs();
        int enabled;
-       unsigned long flags;
 
        /*
         * LOONGSON2 defines two 32-bit performance counters.
@@ -136,8 +133,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
        counter1 = counter & 0xffffffff;
        counter2 = counter >> 32;
 
-       spin_lock_irqsave(&sample_lock, flags);
-
        if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) {
                if (reg.cnt1_enabled)
                        oprofile_add_sample(regs, 0);
@@ -149,8 +144,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
                counter2 = reg.reset_counter2;
        }
 
-       spin_unlock_irqrestore(&sample_lock, flags);
-
        write_c0_perfcnt((counter2 << 32) | counter1);
 
        return IRQ_HANDLED;