Introduce GT_ADD_LO and GT_SUB_LO

Commit migrated from https://github.com/dotnet/coreclr/commit/77f1603b268452bc49ccd69ae8930e5e5357ca39

diff --git a/src/coreclr/src/jit/codegenxarch.cpp b/src/coreclr/src/jit/codegenxarch.cpp
index dcb3a4b..9818234 100755 (executable)
--- a/src/coreclr/src/jit/codegenxarch.cpp
+++ b/src/coreclr/src/jit/codegenxarch.cpp
@@ -1346,7 +1346,9 @@ void CodeGen::genCodeForBinary(GenTree* treeNode)
     assert (oper == GT_OR || 
             oper == GT_XOR ||
             oper == GT_AND ||
+            oper == GT_ADD_LO ||
             oper == GT_ADD_HI ||
+            oper == GT_SUB_LO ||
             oper == GT_SUB_HI ||
             oper == GT_MUL_HI ||
             oper == GT_DIV_HI ||
@@ -1944,7 +1946,9 @@ CodeGen::genCodeForTreeNode(GenTreePtr treeNode)
         __fallthrough;
 
 #if !defined(_TARGET_64BIT_)
+    case GT_ADD_LO:
     case GT_ADD_HI:
+    case GT_SUB_LO:
     case GT_SUB_HI:
 #endif // !defined(_TARGET_64BIT_)
     case GT_ADD:
@@ -4400,7 +4404,9 @@ instruction CodeGen::genGetInsForOper(genTreeOps oper, var_types type)
     case GT_SUB: ins = INS_sub; break;
     case GT_XOR: ins = INS_xor; break;
 #if !defined(_TARGET_64BIT_)
+    case GT_ADD_LO: ins = INS_add; break;
     case GT_ADD_HI: ins = INS_adc; break;
+    case GT_SUB_LO: ins = INS_sub; break;
     case GT_SUB_HI: ins = INS_sbb; break;
 #endif // !defined(_TARGET_64BIT_)
     default: unreached();

diff --git a/src/coreclr/src/jit/compiler.hpp b/src/coreclr/src/jit/compiler.hpp
index b6190e9..834aee9 100644 (file)
--- a/src/coreclr/src/jit/compiler.hpp
+++ b/src/coreclr/src/jit/compiler.hpp
@@ -1532,6 +1532,7 @@ bool                GenTree::gtOverflow() const
     assert(gtOper == GT_MUL      || gtOper == GT_CAST     ||
            gtOper == GT_ADD      || gtOper == GT_SUB      ||
            gtOper == GT_ASG_ADD  || gtOper == GT_ASG_SUB  ||
+           gtOper == GT_ADD_LO   || gtOper == GT_SUB_LO   ||
            gtOper == GT_ADD_HI   || gtOper == GT_SUB_HI);
 #else
     assert(gtOper == GT_MUL      || gtOper == GT_CAST     ||

diff --git a/src/coreclr/src/jit/gtlist.h b/src/coreclr/src/jit/gtlist.h
index 8248b53..ee33797 100644 (file)
--- a/src/coreclr/src/jit/gtlist.h
+++ b/src/coreclr/src/jit/gtlist.h
@@ -153,7 +153,9 @@ GTNODE(LONG       , "gt_long"    ,0,GTK_BINOP)
 // The following are nodes representing the upper half of a 64-bit operation
 // that requires a carry/borrow.  However, they are all named GT_XXX_HI for
 // consistency.
+GTNODE(ADD_LO     , "+Lo"          ,1,GTK_BINOP)
 GTNODE(ADD_HI     , "+Hi"          ,1,GTK_BINOP)
+GTNODE(SUB_LO     , "-Lo"          ,0,GTK_BINOP)
 GTNODE(SUB_HI     , "-Hi"          ,0,GTK_BINOP)
 GTNODE(MUL_HI     , "*Hi"          ,1,GTK_BINOP)
 GTNODE(DIV_HI     , "/Hi"          ,0,GTK_BINOP)

diff --git a/src/coreclr/src/jit/lower.cpp b/src/coreclr/src/jit/lower.cpp
index 26f3a53..bb4c255 100755 (executable)
--- a/src/coreclr/src/jit/lower.cpp
+++ b/src/coreclr/src/jit/lower.cpp
@@ -151,6 +151,21 @@ genTreeOps getHiOper(genTreeOps oper)
         return GT_NONE;
     }
 }
+
+genTreeOps getLoOper(genTreeOps oper)
+{
+    switch(oper)
+    {
+    case GT_ADD: return GT_ADD_LO;  break;
+    case GT_SUB: return GT_SUB_LO;  break;
+    case GT_OR:  return GT_OR;      break;
+    case GT_AND: return GT_AND;     break;
+    case GT_XOR: return GT_XOR;     break;
+    default:
+        assert(!"getLoOper called for invalid oper");
+        return GT_NONE;
+    }
+}
 #endif // !defined(_TARGET_64BIT_)
 
 //------------------------------------------------------------------------
@@ -525,6 +540,7 @@ void Lowering::DecomposeNode(GenTreePtr* pTree, Compiler::fgWalkData* data)
             // We will reuse "tree" for the loResult, which will now be of TYP_INT, and its operands
             // will be the lo halves of op1 from above.
             loResult = tree;
+            loResult->SetOper(getLoOper(loResult->OperGet()));
             loResult->gtType = TYP_INT;
             loResult->gtOp.gtOp1 = loOp1;
             loResult->gtOp.gtOp2 = loOp2;

diff --git a/src/coreclr/src/jit/lowerxarch.cpp b/src/coreclr/src/jit/lowerxarch.cpp
index 83f6abb..8c23d95 100644 (file)
--- a/src/coreclr/src/jit/lowerxarch.cpp
+++ b/src/coreclr/src/jit/lowerxarch.cpp
@@ -336,6 +336,12 @@ void Lowering::TreeNodeInfoInit(GenTree* stmt)
             info->dstCount = 0;
             break;
 
+#if !defined(_TARGET_64BIT_)
+        case GT_ADD_LO:
+        case GT_ADD_HI:
+        case GT_SUB_LO:
+        case GT_SUB_HI:
+#endif
         case GT_ADD:
         case GT_SUB:
             // SSE2 arithmetic instructions doesn't support the form "op mem, xmm".