fsl/pci: Add workaround for erratum A-005434
authorChunhe Lan <Chunhe.Lan@freescale.com>
Wed, 7 May 2014 02:50:20 +0000 (10:50 +0800)
committerYork Sun <yorksun@freescale.com>
Fri, 16 May 2014 21:24:26 +0000 (16:24 -0500)
By default, all PEX inbound windows PEX_PEXIWARn[TRGT] are
mapped to 0xF, which is local memory. But for BSC9132, 0xF
is CCSR, 0x0 is local memory.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/powerpc/cpu/mpc85xx/cmd_errata.c
arch/powerpc/include/asm/config_mpc85xx.h
drivers/pci/fsl_pci_init.c

index 9d8acd0..3d37a76 100644 (file)
@@ -299,6 +299,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #ifdef CONFIG_SYS_FSL_ERRATUM_A007212
        check_erratum_a007212();
 #endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A005434
+       puts("Work-around for Erratum A-005434 enabled\n");
+#endif
 
        return 0;
 }
index 8a7d4d8..e124b07 100644 (file)
 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
 #define CONFIG_SYS_FSL_PCIE_COMPAT     "fsl,qoriq-pcie-v2.2"
 #define CONFIG_SYS_FSL_ERRATUM_A005125
+#define CONFIG_SYS_FSL_ERRATUM_A005434
 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
 #define CONFIG_ESDHC_HC_BLK_ADDR
index 6317fb1..3a41b0e 100644 (file)
@@ -49,8 +49,13 @@ static void set_inbound_window(volatile pit_t *pi,
                                u64 size)
 {
        u32 sz = (__ilog2_u64(size) - 1);
-       u32 flag = PIWAR_EN | PIWAR_LOCAL |
-                       PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A005434
+       u32 flag = 0;
+#else
+       u32 flag = PIWAR_LOCAL;
+#endif
+
+       flag |= PIWAR_EN | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
 
        out_be32(&pi->pitar, r->phys_start >> 12);
        out_be32(&pi->piwbar, r->bus_start >> 12);