drm/i915/guc/slpc: Add debugfs for SLPC info
authorVinay Belgaumkar <vinay.belgaumkar@intel.com>
Fri, 30 Jul 2021 20:21:14 +0000 (13:21 -0700)
committerJohn Harrison <John.C.Harrison@Intel.com>
Tue, 3 Aug 2021 23:05:35 +0000 (16:05 -0700)
This prints out relevant SLPC info from the SLPC shared structure.

We will send a H2G message which forces SLPC to update the
shared data structure with latest information before reading it.

v2: Address review comments (Michal W)
v3: Remove unnecessary tasks from slpc_info (Michal W)
v4: Rename function to intel_guc_slpc_print_info() (Michal W)
v5: checkpatch()

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210730202119.23810-10-vinay.belgaumkar@intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h

index 72ddfff..887c8c8 100644 (file)
@@ -12,6 +12,7 @@
 #include "gt/uc/intel_guc_ct.h"
 #include "gt/uc/intel_guc_ads.h"
 #include "gt/uc/intel_guc_submission.h"
+#include "gt/uc/intel_guc_slpc.h"
 
 static int guc_info_show(struct seq_file *m, void *data)
 {
@@ -50,11 +51,32 @@ static int guc_registered_contexts_show(struct seq_file *m, void *data)
 }
 DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
 
+static int guc_slpc_info_show(struct seq_file *m, void *unused)
+{
+       struct intel_guc *guc = m->private;
+       struct intel_guc_slpc *slpc = &guc->slpc;
+       struct drm_printer p = drm_seq_file_printer(m);
+
+       if (!intel_guc_slpc_is_used(guc))
+               return -ENODEV;
+
+       return intel_guc_slpc_print_info(slpc, &p);
+}
+DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
+
+static bool intel_eval_slpc_support(void *data)
+{
+       struct intel_guc *guc = (struct intel_guc *)data;
+
+       return intel_guc_slpc_is_used(guc);
+}
+
 void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
 {
        static const struct debugfs_gt_file files[] = {
                { "guc_info", &guc_info_fops, NULL },
                { "guc_registered_contexts", &guc_registered_contexts_fops, NULL },
+               { "guc_slpc_info", &guc_slpc_info_fops, &intel_eval_slpc_support},
        };
 
        if (!intel_guc_is_supported(guc))
index 8bfd188..4bf7c15 100644 (file)
@@ -432,6 +432,35 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc)
        return 0;
 }
 
+int intel_guc_slpc_print_info(struct intel_guc_slpc *slpc, struct drm_printer *p)
+{
+       struct drm_i915_private *i915 = slpc_to_i915(slpc);
+       struct slpc_shared_data *data = slpc->vaddr;
+       struct slpc_task_state_data *slpc_tasks;
+       intel_wakeref_t wakeref;
+       int ret = 0;
+
+       GEM_BUG_ON(!slpc->vma);
+
+       with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
+               ret = slpc_query_task_state(slpc);
+
+               if (!ret) {
+                       slpc_tasks = &data->task_state_data;
+
+                       drm_printf(p, "\tSLPC state: %s\n", slpc_get_state_string(slpc));
+                       drm_printf(p, "\tGTPERF task active: %s\n",
+                                  yesno(slpc_tasks->status & SLPC_GTPERF_TASK_ENABLED));
+                       drm_printf(p, "\tMax freq: %u MHz\n",
+                                  slpc_decode_max_freq(slpc));
+                       drm_printf(p, "\tMin freq: %u MHz\n",
+                                  slpc_decode_min_freq(slpc));
+               }
+       }
+
+       return ret;
+}
+
 void intel_guc_slpc_fini(struct intel_guc_slpc *slpc)
 {
        if (!slpc->vma)
index 78a7893..3ffd4f2 100644 (file)
@@ -9,6 +9,8 @@
 #include "intel_guc_submission.h"
 #include "intel_guc_slpc_types.h"
 
+struct drm_printer;
+
 static inline bool intel_guc_slpc_is_supported(struct intel_guc *guc)
 {
        return guc->slpc.supported;
@@ -33,5 +35,6 @@ int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
 int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
 int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val);
 int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val);
+int intel_guc_slpc_print_info(struct intel_guc_slpc *slpc, struct drm_printer *p);
 
 #endif