radeonsi: replace force_cp_dma arg of si_clear_buffer by enum

The new enum has 3 values:
 - SI_CP_DMA_CLEAR_METHOD: equivalent to force_cp_dma = true
 - SI_COMPUTE_CLEAR_METHOD: to force the clear to use compute
 - SI_AUTO_SELECT_CLEAR_METHOD: equivalent to force_cp_dma = false

No functional change yet, but this will be used later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8958>

diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 2cb7092eb734b1d5a3e0128ecbd42719f1ab7a40..3ad24c1f978dd74a9308ba3c4660437ed8425740 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -1310,7 +1310,7 @@ void si_decompress_dcc(struct si_context *sctx, struct si_texture *tex)
       uint32_t clear_value = DCC_UNCOMPRESSED;
       si_clear_buffer(sctx, ptex, tex->surface.dcc_offset,
                       tex->surface.dcc_size, &clear_value, 4,
-                      SI_COHERENCY_CB_META, false);
+                      SI_COHERENCY_CB_META, SI_AUTO_SELECT_CLEAR_METHOD);
    }
 }
 

diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index e26797634f99523dd87fdc4ab710559159a1cf59..6394eeb277a953858da9cdb2ad5980953857ef53 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -259,7 +259,7 @@ bool vi_dcc_clear_level(struct si_context *sctx, struct si_texture *tex, unsigne
    }
 
    si_clear_buffer(sctx, dcc_buffer, dcc_offset, clear_size, &clear_value, 4, SI_COHERENCY_CB_META,
-                   false);
+                   SI_AUTO_SELECT_CLEAR_METHOD);
    return true;
 }
 
@@ -487,7 +487,8 @@ static void si_do_fast_color_clear(struct si_context *sctx, unsigned *buffers,
          if (tex->buffer.b.b.nr_samples >= 2 && tex->cmask_buffer) {
             uint32_t clear_value = 0xCCCCCCCC;
             si_clear_buffer(sctx, &tex->cmask_buffer->b.b, tex->surface.cmask_offset,
-                            tex->surface.cmask_size, &clear_value, 4, SI_COHERENCY_CB_META, false);
+                            tex->surface.cmask_size, &clear_value, 4, SI_COHERENCY_CB_META,
+                            SI_AUTO_SELECT_CLEAR_METHOD);
             fmask_decompress_needed = true;
          }
       } else {
@@ -515,7 +516,8 @@ static void si_do_fast_color_clear(struct si_context *sctx, unsigned *buffers,
          /* Do the fast clear. */
          uint32_t clear_value = 0;
          si_clear_buffer(sctx, &tex->cmask_buffer->b.b, tex->surface.cmask_offset,
-                         tex->surface.cmask_size, &clear_value, 4, SI_COHERENCY_CB_META, false);
+                         tex->surface.cmask_size, &clear_value, 4, SI_COHERENCY_CB_META,
+                         SI_AUTO_SELECT_CLEAR_METHOD);
          eliminate_needed = true;
       }
 
@@ -608,7 +610,7 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers,
                                 sctx->chip_class == GFX8 ? 0xfffff30f : 0xfffc000f;
          si_clear_buffer(sctx, &zstex->buffer.b.b, zstex->surface.htile_offset,
                          zstex->surface.htile_size, &clear_value, 4,
-                         SI_COHERENCY_DB_META, false);
+                         SI_COHERENCY_DB_META, SI_AUTO_SELECT_CLEAR_METHOD);
       }
 
       /* TC-compatible HTILE only supports depth clears to 0 or 1. */

diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c
index ca5fd5391c509f989e35fa1fd50f60899e82203b..f06f1209a80d542fb6d532298cf1f6db714516e7 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_compute_blit.c
+++ b/src/gallium/drivers/radeonsi/si_compute_blit.c
@@ -273,7 +273,7 @@ static void si_compute_do_clear_or_copy(struct si_context *sctx, struct pipe_res
 
 void si_clear_buffer(struct si_context *sctx, struct pipe_resource *dst, uint64_t offset,
                      uint64_t size, uint32_t *clear_value, uint32_t clear_value_size,
-                     enum si_coherency coher, bool force_cpdma)
+                     enum si_coherency coher, enum si_clear_method method)
 {
    if (!size)
       return;
@@ -345,8 +345,12 @@ void si_clear_buffer(struct si_context *sctx, struct pipe_resource *dst, uint64_
          compute_min_size = 32 * 1024;
       }
 
-      if (clear_value_size > 4 || (!force_cpdma && clear_value_size == 4 && offset % 4 == 0 &&
-                                   size > compute_min_size)) {
+      if (method == SI_AUTO_SELECT_CLEAR_METHOD && (
+           clear_value_size > 4 ||
+           (clear_value_size == 4 && offset % 4 == 0 && size > compute_min_size))) {
+         method = SI_COMPUTE_CLEAR_METHOD;
+      }
+      if (method == SI_COMPUTE_CLEAR_METHOD) {
          si_compute_do_clear_or_copy(sctx, dst, offset, NULL, 0, aligned_size, clear_value,
                                      clear_value_size, coher);
       } else {
@@ -385,7 +389,7 @@ static void si_pipe_clear_buffer(struct pipe_context *ctx, struct pipe_resource
                                  int clear_value_size)
 {
    si_clear_buffer((struct si_context *)ctx, dst, offset, size, (uint32_t *)clear_value,
-                   clear_value_size, SI_COHERENCY_SHADER, false);
+                   clear_value_size, SI_COHERENCY_SHADER, SI_AUTO_SELECT_CLEAR_METHOD);
 }
 
 void si_copy_buffer(struct si_context *sctx, struct pipe_resource *dst, struct pipe_resource *src,
@@ -759,7 +763,7 @@ void si_compute_expand_fmask(struct pipe_context *ctx, struct pipe_resource *tex
    si_clear_buffer(sctx, tex, stex->surface.fmask_offset, stex->surface.fmask_size,
                    (uint32_t *)&fmask_expand_values[log_fragments][log_samples - 1],
                    log_fragments >= 2 && log_samples == 4 ? 8 : 4,
-                   SI_COHERENCY_SHADER, false);
+                   SI_COHERENCY_SHADER, SI_AUTO_SELECT_CLEAR_METHOD);
 }
 
 void si_init_compute_blit_functions(struct si_context *sctx)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index c380dcfe687d606996faca5a1f06af98a6325911..6be553a2de0244f12de92a7ecc31574eaf1cfe35 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -731,7 +731,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
        */
       uint32_t clear_value = 0;
       si_clear_buffer(sctx, sctx->null_const_buf.buffer, 0, sctx->null_const_buf.buffer->width0,
-                      &clear_value, 4, SI_COHERENCY_SHADER, true);
+                      &clear_value, 4, SI_COHERENCY_SHADER, SI_CP_DMA_CLEAR_METHOD);
    }
 
    sctx->initial_gfx_cs_size = sctx->gfx_cs.current.cdw;

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 2aa13948fbadf55de7224902fa5c003898dad324..3c1b788586512d4ecc0c9d2bd9326a30a4db91a2 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1360,9 +1360,14 @@ unsigned si_get_flush_flags(struct si_context *sctx, enum si_coherency coher,
                             enum si_cache_policy cache_policy);
 void si_launch_grid_internal(struct si_context *sctx, struct pipe_grid_info *info,
                                     void *restore_cs, unsigned flags);
+enum si_clear_method {
+  SI_CP_DMA_CLEAR_METHOD,
+  SI_COMPUTE_CLEAR_METHOD,
+  SI_AUTO_SELECT_CLEAR_METHOD
+};
 void si_clear_buffer(struct si_context *sctx, struct pipe_resource *dst, uint64_t offset,
                      uint64_t size, uint32_t *clear_value, uint32_t clear_value_size,
-                     enum si_coherency coher, bool force_cpdma);
+                     enum si_coherency coher, enum si_clear_method method);
 void si_screen_clear_buffer(struct si_screen *sscreen, struct pipe_resource *dst, uint64_t offset,
                             uint64_t size, unsigned value);
 void si_copy_buffer(struct si_context *sctx, struct pipe_resource *dst, struct pipe_resource *src,

diff --git a/src/gallium/drivers/radeonsi/si_test_blit.c b/src/gallium/drivers/radeonsi/si_test_blit.c
index c53dcf9184ff2d7a0d0722da9baf4669a33f8f48..e7222b9127eea82ca2727c416d3b3df6c8aebf0d 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_test_blit.c
+++ b/src/gallium/drivers/radeonsi/si_test_blit.c
@@ -293,7 +293,8 @@ void si_test_blit(struct si_screen *sscreen)
 
       /* clear dst pixels */
       uint32_t zero = 0;
-      si_clear_buffer(sctx, dst, 0, sdst->surface.surf_size, &zero, 4, SI_COHERENCY_SHADER, false);
+      si_clear_buffer(sctx, dst, 0, sdst->surface.surf_size, &zero, 4,
+                      SI_COHERENCY_SHADER, SI_AUTO_SELECT_CLEAR_METHOD);
       memset(dst_cpu.ptr, 0, dst_cpu.layer_stride * tdst.array_size);
 
       /* preparation */