unreachable("Tried to access register with no port");
}
+/* Sources are usually strictly required, but in a few special cases they can
+ * be made optional with the value passed arbitrary. Check that here */
+
+static bool
+bi_src_nullable(bi_instruction *ins, unsigned s)
+{
+ /* Z/S flags inferred */
+ if (ins->type == BI_ZS_EMIT && s < 2)
+ return true;
+
+ return false;
+}
+
static inline enum bifrost_packed_src
bi_get_src(bi_instruction *ins, bi_registers *regs, unsigned s)
{
return bi_get_src_reg_slot(regs, src);
else if (src & BIR_INDEX_PASS)
return src & ~BIR_INDEX_PASS;
+ else if (!src && bi_src_nullable(ins, s))
+ return BIFROST_SRC_STAGE;
else {
#ifndef NDEBUG
bi_print_instruction(ins, stderr);
"divzero": lambda a,b,c,d: '0',
"sem": lambda a,b,c,d: '0', # IEEE 754 compliant NaN rules
+ # For +ZS_EMIT, infer modifiers from specified sources
+ "z": lambda a,b,c,d: '(ins->src[0] != 0)',
+ "stencil": lambda a,b,c,d: '(ins->src[1] != 0)',
+
# We don't support these in the IR yet (TODO)
"saturate": lambda a,b,c,d: '0', # clamp to min/max int
"mask": lambda a,b,c,d: '0', # clz(~0) = ~0
"subgroup": lambda a,b,c,d: '1', # CLPER subgroup4
"inactive_result": lambda a,b,c,d: '0', # CLPER zero
"threads": lambda a,b,c,d: '0', # IMULD odd
- "stencil": lambda a,b,c,d: '1', # ZS_EMIT stencil
- "z": lambda a,b,c,d: '1', # ZS_EMIT z
"combine": lambda a,b,c,d: '0', # BRANCHC any
"format": lambda a,b,c,d: '1', # LEA_TEX_IMM u32
"test_mode": lambda a,b,c,d: '0', # JUMP_EX z