2011-05-11 Richard Sandiford <rdsandiford@googlemail.com>
+ * gas/mips/24k-branch-delay-1.d: Allow 64-bit addresses. Stub out
+ function names.
+ * gas/mips/24k-triple-stores-1.d: Likewise.
+ * gas/mips/24k-triple-stores-2.d: Likewise.
+ * gas/mips/24k-triple-stores-3.d: Likewise.
+ * gas/mips/24k-triple-stores-4.d: Likewise.
+ * gas/mips/24k-triple-stores-5.d: Likewise.
+ * gas/mips/24k-triple-stores-7.d: Likewise.
+ * gas/mips/24k-triple-stores-8.d: Likewise.
+ * gas/mips/24k-triple-stores-9.d: Likewise.
+ * gas/mips/24k-triple-stores-10.d: Likewise.
+ * gas/mips/24k-triple-stores-11.d: Likewise.
+ * gas/mips/24k-triple-stores-6.d: Likewise. Add -EB.
+ * gas/mips/mips.exp: Only run 24k-triple-stores-11.d on ELF targets.
+
+2011-05-11 Richard Sandiford <rdsandiford@googlemail.com>
+
* gas/mips/24k-branch-delay-1.d: Add -32 to assembler options.
* gas/mips/24k-triple-stores-1.d: Likewise.
* gas/mips/24k-triple-stores-2.d: Likewise.
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <func>:
+0+ <.*>:
0: 24620005 addiu v0,v1,5
4: 8c440000 lw a0,0\(v0\)
8: ac430000 sw v1,0\(v0\)
c: ac430008 sw v1,8\(v0\)
10: 00000000 nop
- 14: 10600002 beqz v1,20 <func\+0x20>
+ 14: 10600002 beqz v1,20 <.*>
18: ac430010 sw v1,16\(v0\)
1c: 8c430008 lw v1,8\(v0\)
20: 8c450010 lw a1,16\(v0\)
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: a3a20000 sb v0,0\(sp\)
4: 00000000 nop
8: a3a30008 sb v1,8\(sp\)
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: a1020000 sb v0,0\(t0\)
4: 00000000 nop
8: a1030008 sb v1,8\(t0\)
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: 00842020 add a0,a0,a0
4: 00842020 add a0,a0,a0
8: 00842020 add a0,a0,a0
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: a3a20000 sb v0,0\(sp\)
4: 00000000 nop
8: a3a3000a sb v1,10\(sp\)
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: a3a2000b sb v0,11\(sp\)
4: 00000000 nop
8: a3a3000b sb v1,11\(sp\)
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: a113000a sb s3,10\(t0\)
4: 00000000 nop
8: a5130001 sh s3,1\(t0\)
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: a5020007 sh v0,7\(t0\)
4: 00000000 nop
8: a1030000 sb v1,0\(t0\)
#objdump: -dr
-#as: -mfix-24k -32
+#as: -mfix-24k -32 -EB
#name: 24K: Triple Store (Store Macro Check)
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: abbf0050 swl ra,80\(sp\)
4: 00000000 nop
8: bbbf0053 swr ra,83\(sp\)
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: a1130004 sb s3,4\(t0\)
4: 00000000 nop
8: ad130008 sw s3,8\(t0\)
.*: +file format .*mips.*
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: a1130000 sb s3,0\(t0\)
4: 00000000 nop
8: a1130001 sb s3,1\(t0\)
Disassembly of section .text:
-00000000 <.text>:
+0+ <.*>:
0: a1020000 sb v0,0\(t0\)
4: 00000000 nop
8: a1030008 sb v1,8\(t0\)
run_dump_test_arches "24k-triple-stores-8" [mips_arch_list_matching mips1]
run_dump_test_arches "24k-triple-stores-9" [mips_arch_list_matching mips1]
run_dump_test_arches "24k-triple-stores-10" [mips_arch_list_matching mips1]
- run_dump_test_arches "24k-triple-stores-11" [mips_arch_list_matching mips1]
+ if $elf {
+ run_dump_test_arches "24k-triple-stores-11" \
+ [mips_arch_list_matching mips1]
+ }
if $elf {
run_dump_test_arches "jal-svr4pic" \