Merge tag 'drm-msm-fixes-2019-01-24' of git://people.freedesktop.org/~robclark/linux...

A few fixes for v5.0.. the opp-level fix and removal of hard-coded irq
name is partially to make things smoother in v5.1 merge window to
avoid dependency on drm vs dt trees, but are otherwise sane changes.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsAEHd2tGRQxRTs+A-8y_tthPs2iUgCCCEwR5vDMXab4A@mail.gmail.com

diff --combined drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 5beb83d,e942316..ce1b3cc
--- 1/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
--- 2/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@@ -927,6 -927,26 +927,6 @@@ static int a6xx_gmu_memory_probe(struc
        return ret;
  }
  
 -/* Get the list of RPMh voltage levels from cmd-db */
 -static int a6xx_gmu_rpmh_arc_cmds(const char *id, void *vals, int size)
 -{
 -      u32 len = cmd_db_read_aux_data_len(id);
 -
 -      if (!len)
 -              return 0;
 -
 -      if (WARN_ON(len > size))
 -              return -EINVAL;
 -
 -      cmd_db_read_aux_data(id, vals, len);
 -
 -      /*
 -       * The data comes back as an array of unsigned shorts so adjust the
 -       * count accordingly
 -       */
 -      return len >> 1;
 -}
 -
  /* Return the 'arc-level' for the given frequency */
  static u32 a6xx_gmu_get_arc_level(struct device *dev, unsigned long freq)
  {
@@@ -944,7 -964,7 +944,7 @@@
        np = dev_pm_opp_get_of_node(opp);
  
        if (np) {
-               of_property_read_u32(np, "qcom,level", &val);
+               of_property_read_u32(np, "opp-level", &val);
                of_node_put(np);
        }
  
@@@ -954,30 -974,11 +954,30 @@@
  }
  
  static int a6xx_gmu_rpmh_arc_votes_init(struct device *dev, u32 *votes,
 -              unsigned long *freqs, int freqs_count,
 -              u16 *pri, int pri_count,
 -              u16 *sec, int sec_count)
 +              unsigned long *freqs, int freqs_count, const char *id)
  {
        int i, j;
 +      const u16 *pri, *sec;
 +      size_t pri_count, sec_count;
 +
 +      pri = cmd_db_read_aux_data(id, &pri_count);
 +      if (IS_ERR(pri))
 +              return PTR_ERR(pri);
 +      /*
 +       * The data comes back as an array of unsigned shorts so adjust the
 +       * count accordingly
 +       */
 +      pri_count >>= 1;
 +      if (!pri_count)
 +              return -EINVAL;
 +
 +      sec = cmd_db_read_aux_data("mx.lvl", &sec_count);
 +      if (IS_ERR(sec))
 +              return PTR_ERR(sec);
 +
 +      sec_count >>= 1;
 +      if (!sec_count)
 +              return -EINVAL;
  
        /* Construct a vote for each frequency */
        for (i = 0; i < freqs_count; i++) {
@@@ -1036,15 -1037,25 +1036,15 @@@ static int a6xx_gmu_rpmh_votes_init(str
        struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu);
        struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
        struct msm_gpu *gpu = &adreno_gpu->base;
 -
 -      u16 gx[16], cx[16], mx[16];
 -      u32 gxcount, cxcount, mxcount;
        int ret;
  
 -      /* Get the list of available voltage levels for each component */
 -      gxcount = a6xx_gmu_rpmh_arc_cmds("gfx.lvl", gx, sizeof(gx));
 -      cxcount = a6xx_gmu_rpmh_arc_cmds("cx.lvl", cx, sizeof(cx));
 -      mxcount = a6xx_gmu_rpmh_arc_cmds("mx.lvl", mx, sizeof(mx));
 -
        /* Build the GX votes */
        ret = a6xx_gmu_rpmh_arc_votes_init(&gpu->pdev->dev, gmu->gx_arc_votes,
 -              gmu->gpu_freqs, gmu->nr_gpu_freqs,
 -              gx, gxcount, mx, mxcount);
 +              gmu->gpu_freqs, gmu->nr_gpu_freqs, "gfx.lvl");
  
        /* Build the CX votes */
        ret |= a6xx_gmu_rpmh_arc_votes_init(gmu->dev, gmu->cx_arc_votes,
 -              gmu->gmu_freqs, gmu->nr_gmu_freqs,
 -              cx, cxcount, mx, mxcount);
 +              gmu->gmu_freqs, gmu->nr_gmu_freqs, "cx.lvl");
  
        return ret;
  }

diff --combined drivers/gpu/drm/msm/msm_gpu.c
index 5f3eff3,abefba5..10babd1
--- 1/drivers/gpu/drm/msm/msm_gpu.c
--- 2/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@@ -347,10 -347,6 +347,10 @@@ static void msm_gpu_crashstate_capture(
  {
        struct msm_gpu_state *state;
  
 +      /* Check if the target supports capturing crash state */
 +      if (!gpu->funcs->gpu_state_get)
 +              return;
 +
        /* Only save one crash state at a time */
        if (gpu->crashstate)
                return;
@@@ -443,9 -439,10 +443,9 @@@ static void recover_worker(struct work_
        if (submit) {
                struct task_struct *task;
  
 -              rcu_read_lock();
 -              task = pid_task(submit->pid, PIDTYPE_PID);
 +              task = get_pid_task(submit->pid, PIDTYPE_PID);
                if (task) {
 -                      comm = kstrdup(task->comm, GFP_ATOMIC);
 +                      comm = kstrdup(task->comm, GFP_KERNEL);
  
                        /*
                         * So slightly annoying, in other paths like
@@@ -458,10 -455,10 +458,10 @@@
                         * about the submit going away.
                         */
                        mutex_unlock(&dev->struct_mutex);
 -                      cmd = kstrdup_quotable_cmdline(task, GFP_ATOMIC);
 +                      cmd = kstrdup_quotable_cmdline(task, GFP_KERNEL);
 +                      put_task_struct(task);
                        mutex_lock(&dev->struct_mutex);
                }
 -              rcu_read_unlock();
  
                if (comm && cmd) {
                        DRM_DEV_ERROR(dev->dev, "%s: offending task: %s (%s)\n",
@@@ -900,7 -897,7 +900,7 @@@ int msm_gpu_init(struct drm_device *drm
        }
  
        /* Get Interrupt: */
-       gpu->irq = platform_get_irq_byname(pdev, config->irqname);
+       gpu->irq = platform_get_irq(pdev, 0);
        if (gpu->irq < 0) {
                ret = gpu->irq;
                DRM_DEV_ERROR(drm->dev, "failed to get irq: %d\n", ret);

diff --combined drivers/gpu/drm/msm/msm_rd.c
index 90e9d0a,d990b5f..d211729
--- 1/drivers/gpu/drm/msm/msm_rd.c
--- 2/drivers/gpu/drm/msm/msm_rd.c
+++ b/drivers/gpu/drm/msm/msm_rd.c
@@@ -115,7 -115,9 +115,9 @@@ static void rd_write(struct msm_rd_stat
                char *fptr = &fifo->buf[fifo->head];
                int n;
  
-               wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0);
+               wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0 || !rd->open);
+               if (!rd->open)
+                       return;
  
                /* Note that smp_load_acquire() is not strictly required
                 * as CIRC_SPACE_TO_END() does not access the tail more
@@@ -213,7 -215,10 +215,10 @@@ out
  static int rd_release(struct inode *inode, struct file *file)
  {
        struct msm_rd_state *rd = inode->i_private;
+ 
        rd->open = false;
+       wake_up_all(&rd->fifo_event);
+ 
        return 0;
  }
  
@@@ -316,11 -321,10 +321,11 @@@ static void snapshot_buf(struct msm_rd_
                uint64_t iova, uint32_t size)
  {
        struct msm_gem_object *obj = submit->bos[idx].obj;
 +      unsigned offset = 0;
        const char *buf;
  
        if (iova) {
 -              buf += iova - submit->bos[idx].iova;
 +              offset = iova - submit->bos[idx].iova;
        } else {
                iova = submit->bos[idx].iova;
                size = obj->base.size;
@@@ -341,8 -345,6 +346,8 @@@
        if (IS_ERR(buf))
                return;
  
 +      buf += offset;
 +
        rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);
  
        msm_gem_put_vaddr(&obj->base);