ranges: true
cs-gpios:
- minItems: 1
- maxItems: 8
description:
Array of chip-select available to the controller. The first
entries are a 1:1 mapping of the available chip-select on the
chip-select as needed may follow and should be phandles of GPIO
lines. 'reg' entries of the NAND chip subnodes become indexes of
this array when this property is present.
+ minItems: 1
+ maxItems: 8
patternProperties:
"^nand@[a-f0-9]$":
Contains the chip-select IDs.
nand-ecc-engine:
- allOf:
- - $ref: /schemas/types.yaml#/definitions/phandle
description: |
A phandle on the hardware ECC engine if any. There are
basically three possibilities:
case the phandle should reference the node itself.
3/ The ECC engine is external, in this case the phandle should
reference the specific ECC engine node.
+ $ref: /schemas/types.yaml#/definitions/phandle
nand-use-soft-ecc-engine:
- type: boolean
description: Use a software ECC engine.
+ type: boolean
nand-no-ecc-engine:
- type: boolean
description: Do not use any ECC correction.
+ type: boolean
nand-ecc-placement:
- allOf:
- - $ref: /schemas/types.yaml#/definitions/string
- - enum: [ oob, interleaved ]
description:
Location of the ECC bytes. This location is unknown by default
but can be explicitly set to "oob", if all ECC bytes are
known to be stored in the OOB area, or "interleaved" if ECC
bytes will be interleaved with regular data in the main area.
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [ oob, interleaved ]
nand-ecc-algo:
description:
default: 8
nand-on-flash-bbt:
- $ref: /schemas/types.yaml#/definitions/flag
description:
With this property, the OS will search the device for a Bad
Block Table (BBT). If not found, it will create one, reserve
few pages of all the blocks will be scanned at boot time to
find Bad Block Markers (BBM). These markers will help to
build a volatile BBT in RAM.
+ $ref: /schemas/types.yaml#/definitions/flag
nand-ecc-strength:
description:
minimum: 1
nand-ecc-maximize:
- $ref: /schemas/types.yaml#/definitions/flag
description:
Whether or not the ECC strength should be maximized. The
maximum ECC strength is both controller and chip
constraint into account. This is particularly useful when
only the in-band area is used by the upper layers, and you
want to make your NAND as reliable as possible.
+ $ref: /schemas/types.yaml#/definitions/flag
nand-is-boot-medium:
- $ref: /schemas/types.yaml#/definitions/flag
description:
Whether or not the NAND chip is a boot medium. Drivers might
use this information to select ECC algorithms supported by
the boot ROM or similar restrictions.
+ $ref: /schemas/types.yaml#/definitions/flag
nand-rb:
- $ref: /schemas/types.yaml#/definitions/uint32-array
description:
Contains the native Ready/Busy IDs.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
rb-gpios:
description:
should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted.
secure-regions:
- $ref: /schemas/types.yaml#/definitions/uint64-matrix
description:
Regions in the NAND chip which are protected using a secure element
like Trustzone. This property contains the start address and size of
the secure regions present.
+ $ref: /schemas/types.yaml#/definitions/uint64-matrix
required:
- reg