arm64: dts: marvell: Add ethernet switch definition for the ESPRESSObin

This defines and enables the Marvell ethernet switch MVE886341 on the
Marvell ESPRESSObin board.

Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
index 83178d9..12d9f65 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
@@ -80,3 +80,69 @@
 &usb3 {
        status = "okay";
 };
+
+&mdio {
+       switch0: switch0@1 {
+               compatible = "marvell,mv88e6085";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <1>;
+
+               dsa,member = <0 0>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&eth0>;
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "wan";
+                               phy-handle = <&switch0phy0>;
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan0";
+                               phy-handle = <&switch0phy1>;
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan1";
+                               phy-handle = <&switch0phy2>;
+                       };
+
+               };
+
+               mdio {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       switch0phy0: switch0phy0@11 {
+                               reg = <0x11>;
+                       };
+                       switch0phy1: switch0phy1@12 {
+                               reg = <0x12>;
+                       };
+                       switch0phy2: switch0phy2@13 {
+                               reg = <0x13>;
+                       };
+               };
+       };
+};
+
+&eth0 {
+       phy-mode = "rgmii-id";
+       status = "okay";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};