[PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in coproce...

opcodes/ChangeLog:
2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* arm-dis.c (print_insn_coprocessor_1): Disable the use of coprocessors
	8, 14 and 15 for Armv8.1-M Mainline.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ad73bdf..c2f78fc 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,4 +1,9 @@
 2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+       * arm-dis.c (print_insn_coprocessor_1): Disable the use of coprocessors
+       8, 14 and 15 for Armv8.1-M Mainline.
+
+2019-05-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Michael Collison <michael.collison@arm.com>
 
        * arm-dis.c (enum mve_instructions): New enum.

diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 615f34f..ddf707d 100644 (file)
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -3731,6 +3731,13 @@ print_insn_coprocessor (bfd_vma pc,
        {
          if (cp_num == 9 || cp_num == 10 || cp_num == 11)
            is_unpredictable = TRUE;
+
+         /* Armv8.1-M Mainline FP & MVE instructions.  */
+         if (ARM_CPU_HAS_FEATURE (arm_ext_v8_1m_main, allowed_arches)
+             && !ARM_CPU_IS_ANY (allowed_arches)
+             && (cp_num == 8 || cp_num == 14 || cp_num == 15))
+           continue;
+
        }
       else if (insn->value == 0x0e000000     /* cdp  */
               || insn->value == 0xfe000000  /* cdp2  */