intel/isl: Build gen 12.5

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>

diff --git a/src/intel/Android.isl.mk b/src/intel/Android.isl.mk
index 77d0936..c151914 100644 (file)
--- a/src/intel/Android.isl.mk
+++ b/src/intel/Android.isl.mk
@@ -200,6 +200,25 @@ include $(MESA_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
 
 # ---------------------------------------
+# Build libmesa_isl_gen125
+# ---------------------------------------
+
+include $(CLEAR_VARS)
+
+LOCAL_MODULE := libmesa_isl_gen125
+
+LOCAL_SRC_FILES := $(ISL_GEN125_FILES)
+
+LOCAL_CFLAGS := -DGEN_VERSIONx10=125
+
+LOCAL_C_INCLUDES := $(LIBISL_GENX_COMMON_INCLUDES)
+
+LOCAL_WHOLE_STATIC_LIBRARIES := libmesa_genxml
+
+include $(MESA_COMMON_MK)
+include $(BUILD_STATIC_LIBRARY)
+
+# ---------------------------------------
 # Build libmesa_isl_tiled_memcpy
 # ---------------------------------------
 
@@ -269,6 +288,7 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \
        libmesa_isl_gen9 \
        libmesa_isl_gen11 \
        libmesa_isl_gen12 \
+       libmesa_isl_gen125 \
        libmesa_genxml \
        libmesa_isl_tiled_memcpy
 

diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources
index 9169f36..f0eb1cf 100644 (file)
--- a/src/intel/Makefile.sources
+++ b/src/intel/Makefile.sources
@@ -239,6 +239,12 @@ ISL_GEN12_FILES = \
        isl/isl_emit_depth_stencil.c \
        isl/isl_surface_state.c
 
+ISL_GEN125_FILES = \
+       isl/isl_gen12.c \
+       isl/isl_gen12.h \
+       isl/isl_emit_depth_stencil.c \
+       isl/isl_surface_state.c
+
 ISL_GENERATED_FILES = \
        isl/isl_format_layout.c
 

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index f1849c0..e5d324a 100644 (file)
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -2219,7 +2219,11 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
       isl_gen11_##func(__VA_ARGS__);               \
       break;                                       \
    case 12:                                        \
-      isl_gen12_##func(__VA_ARGS__);               \
+      if (ISL_DEV_IS_GEN12HP(dev)) {               \
+         isl_gen125_##func(__VA_ARGS__);           \
+      } else {                                     \
+         isl_gen12_##func(__VA_ARGS__);            \
+      }                                            \
       break;                                       \
    default:                                        \
       assert(!"Unknown hardware generation");      \

diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 5ed615a..8de60d7 100644 (file)
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -85,6 +85,10 @@ struct brw_image_param;
 #define ISL_DEV_IS_BAYTRAIL(__dev) ((__dev)->info->is_baytrail)
 #endif
 
+#ifndef ISL_DEV_IS_GEN12HP
+#define ISL_DEV_IS_GEN12HP(__dev) (gen_device_info_is_12hp((__dev)->info))
+#endif
+
 #ifndef ISL_DEV_USE_SEPARATE_STENCIL
 /**
  * You can define this as a compile-time constant in the CFLAGS. For example,

diff --git a/src/intel/isl/isl_priv.h b/src/intel/isl/isl_priv.h
index a203ce2..9a38271 100644 (file)
--- a/src/intel/isl/isl_priv.h
+++ b/src/intel/isl/isl_priv.h
@@ -232,6 +232,9 @@ _isl_memcpy_tiled_to_linear_sse41(uint32_t xt1, uint32_t xt2,
 #  define genX(x) gen12_##x
 #  include "isl_genX_priv.h"
 #  undef genX
+#  define genX(x) gen125_##x
+#  include "isl_genX_priv.h"
+#  undef genX
 #endif
 
 #endif /* ISL_PRIV_H */

diff --git a/src/intel/isl/meson.build b/src/intel/isl/meson.build
index ad84cc4..35adc64 100644 (file)
--- a/src/intel/isl/meson.build
+++ b/src/intel/isl/meson.build
@@ -53,10 +53,16 @@ isl_gen12_files = files(
   'isl_gen12.h',
 )
 
+isl_gen125_files = files(
+  'isl_gen12.c',
+  'isl_gen12.h',
+)
+
 isl_gen_libs = []
 foreach g : [['40', isl_gen4_files], ['50', []], ['60', isl_gen6_files],
              ['70', isl_gen7_files], ['75', []], ['80', isl_gen8_files],
-             ['90', isl_gen9_files], ['110', []], ['120', isl_gen12_files]]
+             ['90', isl_gen9_files], ['110', []], ['120', isl_gen12_files],
+             ['125', isl_gen12_files]]
   _gen = g[0]
   isl_gen_libs += static_library(
     'isl_gen@0@'.format(_gen),