riscv: dts: jh7110: Add syscon support
authormason.huo <mason.huo@starfivetech.com>
Fri, 22 Apr 2022 00:36:34 +0000 (08:36 +0800)
committermason.huo <mason.huo@starfivetech.com>
Fri, 22 Apr 2022 02:43:20 +0000 (10:43 +0800)
Add 'stg', 'sys', 'aon' system control register support,
access these registers through syscon framework.

Signed-off-by: mason.huo <mason.huo@starfivetech.com>
arch/riscv/boot/dts/starfive/jh7110.dtsi

index 490ebea..11079cc 100644 (file)
                        cache-unified;
                };
 
+               aon_syscon: aon_syscon@17010000 {
+                               compatible = "syscon";
+                               reg = <0x0 0x17010000 0x0 0x1000>;
+               };
+
+               stg_syscon: stg_syscon@10240000 {
+                               compatible = "syscon";
+                               reg = <0x0 0x10240000 0x0 0x1000>;
+               };
+
+               sys_syscon: sys_syscon@13030000 {
+                               compatible = "syscon";
+                               reg = <0x0 0x13030000 0x0 0x1000>;
+               };
+
                clint: clint@2000000 {
                        compatible = "riscv,clint0";
                        reg = <0x0 0x2000000 0x0 0x10000>;