ARM: dts: at91: sama7: Align with Linux Devicetree

This patch makes sure that the Devicetree for the sama7
boards are aligned with the Devicetree from Linux. This
implies removing the GPIO compatible and replacing it
with the PINCTRL one, as well as unifying the SDMMC
pinctrl related subnodes under one single subnode.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>

diff --git a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
index 6013867..d294ddb 100644 (file)
--- a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
+++ b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
@@ -28,7 +28,7 @@
        u-boot,dm-pre-reloc;
 };
 
-&pinctrl {
+&pioA {
        u-boot,dm-pre-reloc;
 };
 

diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts
index eaba0de..aed84f1 100644 (file)
--- a/arch/arm/dts/at91-sama7g5ek.dts
+++ b/arch/arm/dts/at91-sama7g5ek.dts
@@ -690,46 +690,67 @@
        };
 
        pinctrl_sdmmc0_default: sdmmc0_default {
-               pinmux = <PIN_PA1__SDMMC0_CMD>,
-                        <PIN_PA3__SDMMC0_DAT0>,
-                        <PIN_PA4__SDMMC0_DAT1>,
-                        <PIN_PA5__SDMMC0_DAT2>,
-                        <PIN_PA6__SDMMC0_DAT3>,
-                        <PIN_PA7__SDMMC0_DAT4>,
-                        <PIN_PA8__SDMMC0_DAT5>,
-                        <PIN_PA9__SDMMC0_DAT6>,
-                        <PIN_PA10__SDMMC0_DAT7>,
-                        <PIN_PA0__SDMMC0_CK>,
-                        <PIN_PA2__SDMMC0_RSTN>,
-                        <PIN_PA14__SDMMC0_CD>,
-                        <PIN_PA11__SDMMC0_DS>;
+               cmd_data {
+                       pinmux = <PIN_PA1__SDMMC0_CMD>,
+                                <PIN_PA3__SDMMC0_DAT0>,
+                                <PIN_PA4__SDMMC0_DAT1>,
+                                <PIN_PA5__SDMMC0_DAT2>,
+                                <PIN_PA6__SDMMC0_DAT3>,
+                                <PIN_PA7__SDMMC0_DAT4>,
+                                <PIN_PA8__SDMMC0_DAT5>,
+                                <PIN_PA9__SDMMC0_DAT6>,
+                                <PIN_PA10__SDMMC0_DAT7>;
                        slew-rate = <0>;
                        bias-pull-up;
+               };
+
+               ck_cd_rstn_vddsel {
+                       pinmux = <PIN_PA0__SDMMC0_CK>,
+                                <PIN_PA2__SDMMC0_RSTN>,
+                                <PIN_PA14__SDMMC0_CD>,
+                                <PIN_PA11__SDMMC0_DS>;
+                       slew-rate = <0>;
+                       bias-pull-up;
+               };
        };
 
        pinctrl_sdmmc1_default: sdmmc1_default {
-               pinmux = <PIN_PB29__SDMMC1_CMD>,
-                        <PIN_PB31__SDMMC1_DAT0>,
-                        <PIN_PC0__SDMMC1_DAT1>,
-                        <PIN_PC1__SDMMC1_DAT2>,
-                        <PIN_PC2__SDMMC1_DAT3>,
-                        <PIN_PB30__SDMMC1_CK>,
-                        <PIN_PB28__SDMMC1_RSTN>,
-                        <PIN_PC5__SDMMC1_1V8SEL>,
-                        <PIN_PC4__SDMMC1_CD>;
-               slew-rate = <0>;
-               bias-pull-up;
+               cmd_data {
+                       pinmux = <PIN_PB29__SDMMC1_CMD>,
+                                <PIN_PB31__SDMMC1_DAT0>,
+                                <PIN_PC0__SDMMC1_DAT1>,
+                                <PIN_PC1__SDMMC1_DAT2>,
+                                <PIN_PC2__SDMMC1_DAT3>;
+                       slew-rate = <0>;
+                       bias-pull-up;
+               };
+
+               ck_cd_rstn_vddsel {
+                       pinmux = <PIN_PB30__SDMMC1_CK>,
+                                <PIN_PB28__SDMMC1_RSTN>,
+                                <PIN_PC5__SDMMC1_1V8SEL>,
+                                <PIN_PC4__SDMMC1_CD>;
+                       slew-rate = <0>;
+                       bias-pull-up;
+               };
        };
 
        pinctrl_sdmmc2_default: sdmmc2_default {
-               pinmux = <PIN_PD3__SDMMC2_CMD>,
-                        <PIN_PD5__SDMMC2_DAT0>,
-                        <PIN_PD6__SDMMC2_DAT1>,
-                        <PIN_PD7__SDMMC2_DAT2>,
-                        <PIN_PD8__SDMMC2_DAT3>,
-                        <PIN_PD4__SDMMC2_CK>;
-               slew-rate = <0>;
-               bias-pull-up;
+               cmd_data {
+                       pinmux = <PIN_PD3__SDMMC2_CMD>,
+                                <PIN_PD5__SDMMC2_DAT0>,
+                                <PIN_PD6__SDMMC2_DAT1>,
+                                <PIN_PD7__SDMMC2_DAT2>,
+                                <PIN_PD8__SDMMC2_DAT3>;
+                       slew-rate = <0>;
+                       bias-pull-up;
+               };
+
+               ck {
+                       pinmux = <PIN_PD4__SDMMC2_CK>;
+                       slew-rate = <0>;
+                       bias-pull-up;
+               };
        };
 
        pinctrl_spdifrx_default: spdifrx_default {

diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 97400dc..d38090d 100644 (file)
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -187,8 +187,8 @@
                        reg = <0xe0008000 0x20>;
                };
 
-               pinctrl: pinctrl@e0014000 {
-                       compatible = "microchip,sama7g5-gpio";
+               pioA: pinctrl@e0014000 {
+                       compatible = "microchip,sama7g5-pinctrl";
                        reg = <0xe0014000 0x800>;
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
@@ -196,14 +196,10 @@
                                <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
-
-                       pioA: pinctrl_default {
-                               interrupt-controller;
-                               #interrupt-cells = <2>;
-                               gpio-controller;
-                               #gpio-cells = <2>;
-                               compatible = "microchip,sama7g5-pinctrl";
-                       };
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
                };
 
                pmc: pmc@e0018000 {