drm/amd/display: extract set stream attribute to link_hwss

[why]
Extract set stream attribute into link_hwss as part of the link hwss
refactor work.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: George Shen <George.Shen@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 7aede64..47b67fd 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -4123,6 +4123,7 @@ void core_link_enable_stream(
        struct link_encoder *link_enc;
        enum otg_out_mux_dest otg_out_dest = OUT_MUX_DIO;
        struct vpg *vpg = pipe_ctx->stream_res.stream_enc->vpg;
+       const struct link_hwss *link_hwss = get_link_hwss(link, &pipe_ctx->link_res);
 
        if (is_dp_128b_132b_signal(pipe_ctx))
                vpg = pipe_ctx->stream_res.hpo_dp_stream_enc->vpg;
@@ -4151,56 +4152,19 @@ void core_link_enable_stream(
                        link_enc->funcs->setup(
                                link_enc,
                                pipe_ctx->stream->signal);
-               pipe_ctx->stream_res.stream_enc->funcs->setup_stereo_sync(
-                       pipe_ctx->stream_res.stream_enc,
-                       pipe_ctx->stream_res.tg->inst,
-                       stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE);
        }
 
-       if (is_dp_128b_132b_signal(pipe_ctx)) {
-               pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->set_stream_attribute(
-                               pipe_ctx->stream_res.hpo_dp_stream_enc,
-                               &stream->timing,
-                               stream->output_color_space,
-                               stream->use_vsc_sdp_for_colorimetry,
-                               stream->timing.flags.DSC,
-                               false);
-               otg_out_dest = OUT_MUX_HPO_DP;
-       } else if (dc_is_dp_signal(pipe_ctx->stream->signal)) {
-               pipe_ctx->stream_res.stream_enc->funcs->dp_set_stream_attribute(
-                               pipe_ctx->stream_res.stream_enc,
-                               &stream->timing,
-                               stream->output_color_space,
-                               stream->use_vsc_sdp_for_colorimetry,
-                               stream->link->dpcd_caps.dprx_feature.bits.SST_SPLIT_SDP_CAP);
-       }
-
-       if (dc_is_dp_signal(pipe_ctx->stream->signal))
-               dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_DP_STREAM_ATTR);
-
-       if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))
-               pipe_ctx->stream_res.stream_enc->funcs->hdmi_set_stream_attribute(
-                       pipe_ctx->stream_res.stream_enc,
-                       &stream->timing,
-                       stream->phy_pix_clk,
-                       pipe_ctx->stream_res.audio != NULL);
-
        pipe_ctx->stream->link->link_state_valid = true;
 
-       if (pipe_ctx->stream_res.tg->funcs->set_out_mux)
+       if (pipe_ctx->stream_res.tg->funcs->set_out_mux) {
+               if (is_dp_128b_132b_signal(pipe_ctx))
+                       otg_out_dest = OUT_MUX_HPO_DP;
+               else
+                       otg_out_dest = OUT_MUX_DIO;
                pipe_ctx->stream_res.tg->funcs->set_out_mux(pipe_ctx->stream_res.tg, otg_out_dest);
+       }
 
-       if (dc_is_dvi_signal(pipe_ctx->stream->signal))
-               pipe_ctx->stream_res.stream_enc->funcs->dvi_set_stream_attribute(
-                       pipe_ctx->stream_res.stream_enc,
-                       &stream->timing,
-                       (pipe_ctx->stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK) ?
-                       true : false);
-
-       if (dc_is_lvds_signal(pipe_ctx->stream->signal))
-               pipe_ctx->stream_res.stream_enc->funcs->lvds_set_stream_attribute(
-                       pipe_ctx->stream_res.stream_enc,
-                       &stream->timing);
+       link_hwss->setup_stream_attribute(pipe_ctx);
 
        if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
                bool apply_edp_fast_boot_optimization =
@@ -4335,13 +4299,11 @@ void core_link_enable_stream(
                dc->hwss.enable_audio_stream(pipe_ctx);
 
        } else { // if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment))
-               if (is_dp_128b_132b_signal(pipe_ctx)) {
+               if (is_dp_128b_132b_signal(pipe_ctx))
                        fpga_dp_hpo_enable_link_and_stream(state, pipe_ctx);
-               }
                if (dc_is_dp_signal(pipe_ctx->stream->signal) ||
                                dc_is_virtual_signal(pipe_ctx->stream->signal))
                        dp_set_dsc_enable(pipe_ctx, true);
-
        }
 
        if (pipe_ctx->stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) {

diff --git a/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h b/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h
index 3b3090e..e2f8544 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h
@@ -72,6 +72,7 @@ struct link_hwss {
         */
        void (*setup_stream_encoder)(struct pipe_ctx *pipe_ctx);
        void (*reset_stream_encoder)(struct pipe_ctx *pipe_ctx);
+       void (*setup_stream_attribute)(struct pipe_ctx *pipe_ctx);
 };
 #endif /* __DC_LINK_HWSS_H__ */
 

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_hwss_dio.c b/drivers/gpu/drm/amd/display/dc/link/link_hwss_dio.c
index 0f84511..e557c92 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_hwss_dio.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_hwss_dio.c
@@ -62,6 +62,46 @@ void reset_dio_stream_encoder(struct pipe_ctx *pipe_ctx)
 
 }
 
+void setup_dio_stream_attribute(struct pipe_ctx *pipe_ctx)
+{
+       struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc;
+       struct dc_stream_state *stream = pipe_ctx->stream;
+       struct dc_link *link = stream->link;
+
+       if (!dc_is_virtual_signal(stream->signal))
+               stream_encoder->funcs->setup_stereo_sync(
+                               stream_encoder,
+                               pipe_ctx->stream_res.tg->inst,
+                               stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE);
+
+       if (dc_is_dp_signal(stream->signal))
+               stream_encoder->funcs->dp_set_stream_attribute(
+                               stream_encoder,
+                               &stream->timing,
+                               stream->output_color_space,
+                               stream->use_vsc_sdp_for_colorimetry,
+                               link->dpcd_caps.dprx_feature.bits.SST_SPLIT_SDP_CAP);
+       else if (dc_is_hdmi_tmds_signal(stream->signal))
+               stream_encoder->funcs->hdmi_set_stream_attribute(
+                               stream_encoder,
+                               &stream->timing,
+                               stream->phy_pix_clk,
+                               pipe_ctx->stream_res.audio != NULL);
+       else if (dc_is_dvi_signal(stream->signal))
+               stream_encoder->funcs->dvi_set_stream_attribute(
+                               stream_encoder,
+                               &stream->timing,
+                               (stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK) ?
+                                               true : false);
+       else if (dc_is_lvds_signal(stream->signal))
+               stream_encoder->funcs->lvds_set_stream_attribute(
+                               stream_encoder,
+                               &stream->timing);
+
+       if (dc_is_dp_signal(stream->signal))
+               dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_DP_STREAM_ATTR);
+}
+
 void enable_dio_dp_link_output(struct dc_link *link,
                const struct link_resource *link_res,
                enum signal_type signal,
@@ -116,6 +156,7 @@ void set_dio_dp_lane_settings(struct dc_link *link,
 static const struct link_hwss dio_link_hwss = {
        .setup_stream_encoder = setup_dio_stream_encoder,
        .reset_stream_encoder = reset_dio_stream_encoder,
+       .setup_stream_attribute = setup_dio_stream_attribute,
        .ext = {
                .set_throttled_vcp_size = set_dio_throttled_vcp_size,
                .enable_dp_link_output = enable_dio_dp_link_output,

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_hwss_dio.h b/drivers/gpu/drm/amd/display/dc/link/link_hwss_dio.h
index 680df20..08f22b3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_hwss_dio.h
+++ b/drivers/gpu/drm/amd/display/dc/link/link_hwss_dio.h
@@ -34,6 +34,7 @@ void set_dio_throttled_vcp_size(struct pipe_ctx *pipe_ctx,
                struct fixed31_32 throttled_vcp_size);
 void setup_dio_stream_encoder(struct pipe_ctx *pipe_ctx);
 void reset_dio_stream_encoder(struct pipe_ctx *pipe_ctx);
+void setup_dio_stream_attribute(struct pipe_ctx *pipe_ctx);
 void enable_dio_dp_link_output(struct dc_link *link,
                const struct link_resource *link_res,
                enum signal_type signal,

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_hwss_dpia.c b/drivers/gpu/drm/amd/display/dc/link/link_hwss_dpia.c
index 35b2062..f90596f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_hwss_dpia.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_hwss_dpia.c
@@ -29,6 +29,7 @@
 static const struct link_hwss dpia_link_hwss = {
        .setup_stream_encoder = setup_dio_stream_encoder,
        .reset_stream_encoder = reset_dio_stream_encoder,
+       .setup_stream_attribute = setup_dio_stream_attribute,
        .ext = {
                .set_throttled_vcp_size = set_dio_throttled_vcp_size,
                .enable_dp_link_output = enable_dio_dp_link_output,

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_dp.c b/drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_dp.c
index 7491949..311e2e2 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_dp.c
@@ -131,6 +131,22 @@ static void reset_hpo_dp_stream_encoder(struct pipe_ctx *pipe_ctx)
        dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst);
 }
 
+static void setup_hpo_dp_stream_attribute(struct pipe_ctx *pipe_ctx)
+{
+       struct hpo_dp_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_dp_stream_enc;
+       struct dc_stream_state *stream = pipe_ctx->stream;
+       struct dc_link *link = stream->link;
+
+       stream_enc->funcs->set_stream_attribute(
+                       stream_enc,
+                       &stream->timing,
+                       stream->output_color_space,
+                       stream->use_vsc_sdp_for_colorimetry,
+                       stream->timing.flags.DSC,
+                       false);
+       dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_DP_STREAM_ATTR);
+}
+
 static void enable_hpo_dp_fpga_link_output(struct dc_link *link,
                const struct link_resource *link_res,
                enum signal_type signal,
@@ -231,6 +247,7 @@ static void set_hpo_dp_lane_settings(struct dc_link *link,
 static const struct link_hwss hpo_dp_link_hwss = {
        .setup_stream_encoder = setup_hpo_dp_stream_encoder,
        .reset_stream_encoder = reset_hpo_dp_stream_encoder,
+       .setup_stream_attribute = setup_hpo_dp_stream_attribute,
        .ext = {
                .set_throttled_vcp_size = set_hpo_dp_throttled_vcp_size,
                .set_hblank_min_symbol_width = set_hpo_dp_hblank_min_symbol_width,

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_frl.c b/drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_frl.c
index 9df273c..4b5eccd 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_frl.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_frl.c
@@ -26,9 +26,28 @@
 #include "core_types.h"
 #include "virtual/virtual_link_hwss.h"
 
+static void setup_hpo_frl_stream_attribute(struct pipe_ctx *pipe_ctx)
+{
+       struct hpo_frl_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_frl_stream_enc;
+       struct dc_stream_state *stream = pipe_ctx->stream;
+       struct pipe_ctx *odm_pipe;
+       int odm_combine_num_segments = 1;
+
+       /* get number of ODM combine input segments */
+       for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe)
+               odm_combine_num_segments++;
+
+       stream_enc->funcs->hdmi_frl_set_stream_attribute(
+                       stream_enc,
+                       &stream->timing,
+                       &stream->link->frl_link_settings.borrow_params,
+                       odm_combine_num_segments);
+}
+
 static const struct link_hwss hpo_frl_link_hwss = {
        .setup_stream_encoder = virtual_setup_stream_encoder,
        .reset_stream_encoder = virtual_reset_stream_encoder,
+       .setup_stream_attribute = setup_hpo_frl_stream_attribute,
 };
 
 bool can_use_hpo_frl_link_hwss(const struct dc_link *link,

diff --git a/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_hwss.c b/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_hwss.c
index 525eba2..501173c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_hwss.c
@@ -29,12 +29,17 @@ void virtual_setup_stream_encoder(struct pipe_ctx *pipe_ctx)
 {
 }
 
+void virtual_setup_stream_attribute(struct pipe_ctx *pipe_ctx)
+{
+}
+
 void virtual_reset_stream_encoder(struct pipe_ctx *pipe_ctx)
 {
 }
 static const struct link_hwss virtual_link_hwss = {
        .setup_stream_encoder = virtual_setup_stream_encoder,
        .reset_stream_encoder = virtual_reset_stream_encoder,
+       .setup_stream_attribute = virtual_setup_stream_attribute,
 };
 
 const struct link_hwss *get_virtual_link_hwss(void)