drm/i915: Drop has_ddi from device info
authorJosé Roberto de Souza <jose.souza@intel.com>
Thu, 5 May 2022 19:35:22 +0000 (12:35 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Fri, 6 May 2022 16:28:15 +0000 (09:28 -0700)
No need to have this parameter in intel_device_info struct
as all platforms with display version 9 or newer, haswell or broadwell
supports it.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-5-jose.souza@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.h

index bc6d8ccd662ee7938e4057876a9a58efa0473ffc..eddfbf5d3dee61e7da9eba30556d53b5b4d39386 100644 (file)
@@ -1293,7 +1293,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_DP20(dev_priv)     (IS_DG2(dev_priv))
 
 #define HAS_CDCLK_CRAWL(dev_priv)       (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
-#define HAS_DDI(dev_priv)               (INTEL_INFO(dev_priv)->display.has_ddi)
+#define HAS_DDI(dev_priv)               (DISPLAY_VER(dev_priv) >= 9 || \
+                                         IS_BROADWELL(dev_priv) || \
+                                         IS_HASWELL(dev_priv))
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
 #define HAS_PSR(dev_priv)               (INTEL_INFO(dev_priv)->display.has_psr)
 #define HAS_PSR_HW_TRACKING(dev_priv) \
index f60f9babdf2a942fe484e7a436de1cf13cb44c49..44a4723ff7f707bab6452e887dd62d68084273c3 100644 (file)
@@ -535,7 +535,6 @@ static const struct intel_device_info vlv_info = {
        .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
        .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
                BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
-       .display.has_ddi = 1, \
        .display.has_fpga_dbg = 1, \
        .display.has_dp_mst = 1, \
        .has_rc6p = 0 /* RC6p removed-by HSW */, \
@@ -683,7 +682,6 @@ static const struct intel_device_info skl_gt4_info = {
                BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
                BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
        .has_64bit_reloc = 1, \
-       .display.has_ddi = 1, \
        .display.has_fpga_dbg = 1, \
        .display.fbc_mask = BIT(INTEL_FBC_A), \
        .display.has_hdcp = 1, \
@@ -932,7 +930,6 @@ static const struct intel_device_info adl_s_info = {
        .dbuf.size = 4096,                                                      \
        .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |         \
                BIT(DBUF_S4),                                                   \
-       .display.has_ddi = 1,                                                   \
        .display.has_dmc = 1,                                                   \
        .display.has_dp_mst = 1,                                                \
        .display.has_dsb = 1,                                                   \
index 1308752219db6ed526959207722d47b036fc1cc2..cc317a511fb5441fd2b8ae725b1662c3a77a0539 100644 (file)
@@ -162,7 +162,6 @@ enum intel_ppgtt_type {
        func(cursor_needs_physical); \
        func(has_cdclk_crawl); \
        func(has_dmc); \
-       func(has_ddi); \
        func(has_dp_mst); \
        func(has_dsb); \
        func(has_dsc); \