The -mhtm option is fairly useless too.
include/
* opcode/ppc.h (PPC_OPCODE_HTM): Delete.
gas/
* config/tc-ppc.c (md_show_usage): Delete mention of -mhtm.
* testsuite/gas/ppc/htm.d: Pass -mpower8 and -Mpower8.
opcodes/
* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_HTM and "htm".
* ppc-opc.c (PPCHTM): Define as PPC_OPCODE_POWER8.
+2017-04-11 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (md_show_usage): Delete mention of -mhtm.
+ * testsuite/gas/ppc/htm.d: Pass -mpower8 and -Mpower8.
+
2017-04-10 Max Filippov <jcmvbkbc@gmail.com>
* config/tc-xtensa.c (xtensa_maybe_create_literal_pool_frag):
fprintf (stream, _("\
-maltivec generate code for AltiVec\n\
-mvsx generate code for Vector-Scalar (VSX) instructions\n\
--mhtm generate code for Hardware Transactional Memory\n\
-me300 generate code for PowerPC e300 family\n\
-me500, -me500x2 generate code for Motorola e500 core complex\n\
-me500mc, generate code for Freescale e500mc core complex\n\
-#as: -mhtm
-#objdump: -dr -Mhtm
+#as: -mpower8
+#objdump: -dr -Mpower8
#name: Hardware Transactional Memory (HTM) tests
.*
* opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
(PPC_OPCODE_VSX3): Delete.
+ (PPC_OPCODE_HTM): Delete.
2017-04-06 Pip Cet <pipcet@gmail.com>
/* Opcode is only supported by Power8 architecture. */
#define PPC_OPCODE_POWER8 0x2000000000ull
-/* Opcode which is supported by the Hardware Transactional Memory extension. */
-/* Currently, this is the same as the POWER8 mask. If another cpu comes out
- that isn't a superset of POWER8, we can define this to its own mask. */
-#define PPC_OPCODE_HTM PPC_OPCODE_POWER8
-
/* Opcode is supported by ppc750cl. */
#define PPC_OPCODE_750 0x4000000000ull
2017-04-11 Alan Modra <amodra@gmail.com>
- * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2 and
- PPC_OPCODE_VSX3.
+ * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2,
+ PPC_OPCODE_VSX3, PPC_OPCODE_HTM and "htm".
* ppc-opc.c (PPCVEC2): Define as PPC_OPCODE_POWER8|PPC_OPCODE_E6500.
(PPCVEC3): Define as PPC_OPCODE_POWER9.
(PPCVSX2): Define as PPC_OPCODE_POWER8.
(PPCVSX3): Define as PPC_OPCODE_POWER9.
+ (PPCHTM): Define as PPC_OPCODE_POWER8.
2017-04-10 Alan Modra <amodra@gmail.com>
0 },
{ "power8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
- | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
{ "power9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
- | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
+ | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
{ "ppc", PPC_OPCODE_PPC,
0 },
0 },
{ "pwr8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
- | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
{ "pwr9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
- | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
+ | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
{ "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
0 },
PPC_OPCODE_VLE },
{ "vsx", PPC_OPCODE_PPC,
PPC_OPCODE_VSX },
- { "htm", PPC_OPCODE_PPC,
- PPC_OPCODE_HTM },
};
/* Switch between Booke and VLE dialects for interlinked dumps. */
#define E500 PPC_OPCODE_E500
#define E6500 PPC_OPCODE_E6500
#define PPCVLE PPC_OPCODE_VLE
-#define PPCHTM PPC_OPCODE_HTM
+#define PPCHTM PPC_OPCODE_POWER8
#define E200Z4 PPC_OPCODE_E200Z4
/* The list of embedded processors that use the embedded operand ordering
for the 3 operand dcbt and dcbtst instructions. */