drm/i915/dmc: Load DMC on DG2

Add Support for DC states on Dg2.

v2: Add dc9 as the max supported DC states and disable DC5.
v3: set max_dc to 0. (Imre)

Cc: Imre Deak <imre.deak@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>(v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220504202213.740200-2-anusha.srivatsa@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 1d9bd58..15b15f4 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -907,7 +907,9 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
        if (!HAS_DISPLAY(dev_priv))
                return 0;
 
-       if (IS_DG1(dev_priv))
+       if (IS_DG2(dev_priv))
+               max_dc = 0;
+       else if (IS_DG1(dev_priv))
                max_dc = 3;
        else if (DISPLAY_VER(dev_priv) >= 12)
                max_dc = 4;

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 257cf66..2f01aca 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -52,6 +52,10 @@
 
 #define DISPLAY_VER12_DMC_MAX_FW_SIZE  ICL_DMC_MAX_FW_SIZE
 
+#define DG2_DMC_PATH                   DMC_PATH(dg2, 2, 06)
+#define DG2_DMC_VERSION_REQUIRED       DMC_VERSION(2, 06)
+MODULE_FIRMWARE(DG2_DMC_PATH);
+
 #define ADLP_DMC_PATH                  DMC_PATH(adlp, 2, 16)
 #define ADLP_DMC_VERSION_REQUIRED      DMC_VERSION(2, 16)
 MODULE_FIRMWARE(ADLP_DMC_PATH);
@@ -688,7 +692,11 @@ void intel_dmc_ucode_init(struct drm_i915_private *dev_priv)
         */
        intel_dmc_runtime_pm_get(dev_priv);
 
-       if (IS_ALDERLAKE_P(dev_priv)) {
+       if (IS_DG2(dev_priv)) {
+               dmc->fw_path = DG2_DMC_PATH;
+               dmc->required_version = DG2_DMC_VERSION_REQUIRED;
+               dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
+       } else if (IS_ALDERLAKE_P(dev_priv)) {
                dmc->fw_path = ADLP_DMC_PATH;
                dmc->required_version = ADLP_DMC_VERSION_REQUIRED;
                dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;