/*SupportsMapper=*/true, &MapperQualifierLoc,
&MapperIdInfo),
MapType(MapType), MapTypeIsImplicit(MapTypeIsImplicit), MapLoc(MapLoc) {
- assert(llvm::array_lengthof(MapTypeModifiers) == MapModifiers.size() &&
+ assert(llvm::size(MapTypeModifiers) == MapModifiers.size() &&
"Unexpected number of map type modifiers.");
llvm::copy(MapModifiers, std::begin(MapTypeModifiers));
- assert(llvm::array_lengthof(MapTypeModifiersLoc) ==
+ assert(llvm::size(MapTypeModifiersLoc) ==
MapModifiersLoc.size() &&
"Unexpected number of map type modifier locations.");
llvm::copy(MapModifiersLoc, std::begin(MapTypeModifiersLoc));
: OMPMappableExprListClause(llvm::omp::OMPC_to, Locs, Sizes,
/*SupportsMapper=*/true, &MapperQualifierLoc,
&MapperIdInfo) {
- assert(llvm::array_lengthof(MotionModifiers) == TheMotionModifiers.size() &&
+ assert(llvm::size(MotionModifiers) == TheMotionModifiers.size() &&
"Unexpected number of motion modifiers.");
llvm::copy(TheMotionModifiers, std::begin(MotionModifiers));
- assert(llvm::array_lengthof(MotionModifiersLoc) ==
+ assert(llvm::size(MotionModifiersLoc) ==
TheMotionModifiersLoc.size() &&
"Unexpected number of motion modifier locations.");
llvm::copy(TheMotionModifiersLoc, std::begin(MotionModifiersLoc));
: OMPMappableExprListClause(llvm::omp::OMPC_from, Locs, Sizes,
/*SupportsMapper=*/true, &MapperQualifierLoc,
&MapperIdInfo) {
- assert(llvm::array_lengthof(MotionModifiers) == TheMotionModifiers.size() &&
+ assert(llvm::size(MotionModifiers) == TheMotionModifiers.size() &&
"Unexpected number of motion modifiers.");
llvm::copy(TheMotionModifiers, std::begin(MotionModifiers));
- assert(llvm::array_lengthof(MotionModifiersLoc) ==
+ assert(llvm::size(MotionModifiersLoc) ==
TheMotionModifiersLoc.size() &&
"Unexpected number of motion modifier locations.");
llvm::copy(TheMotionModifiersLoc, std::begin(MotionModifiersLoc));
uint64_t FromSize = getTypeSize(BT);
QualType PromoteTypes[] = { IntTy, UnsignedIntTy, LongTy, UnsignedLongTy,
LongLongTy, UnsignedLongLongTy };
- for (size_t Idx = 0; Idx < llvm::array_lengthof(PromoteTypes); ++Idx) {
+ for (size_t Idx = 0; Idx < llvm::size(PromoteTypes); ++Idx) {
uint64_t ToSize = getTypeSize(PromoteTypes[Idx]);
if (FromSize < ToSize ||
(FromSize == ToSize &&
};
llvm::StringRef clang::Attr::getDocumentation(clang::attr::Kind K) {
- if(K < llvm::array_lengthof(AttrDoc))
+ if(K < llvm::size(AttrDoc))
return AttrDoc[K];
return "";
}
CommandTraits::CommandTraits(llvm::BumpPtrAllocator &Allocator,
const CommentOptions &CommentOptions) :
- NextID(llvm::array_lengthof(Commands)), Allocator(Allocator) {
+ NextID(llvm::size(Commands)), Allocator(Allocator) {
registerCommentOptions(CommentOptions);
}
const CommandInfo *CommandTraits::getBuiltinCommandInfo(
unsigned CommandID) {
- if (CommandID < llvm::array_lengthof(Commands))
+ if (CommandID < llvm::size(Commands))
return &Commands[CommandID];
return nullptr;
}
const CommandInfo *CommandTraits::getRegisteredCommandInfo(
unsigned CommandID) const {
- return RegisteredCommands[CommandID - llvm::array_lengthof(Commands)];
+ return RegisteredCommands[CommandID - llvm::size(Commands)];
}
} // end namespace comments
} // namespace
-static const unsigned StaticDiagInfoSize = llvm::array_lengthof(StaticDiagInfo);
+static const unsigned StaticDiagInfoSize = llvm::size(StaticDiagInfo);
/// GetDiagInfo - Return the StaticDiagInfoRec entry for the specified DiagID,
/// or null if the ID is invalid.
/// getNumberOfCategories - Return the number of categories
unsigned DiagnosticIDs::getNumberOfCategories() {
- return llvm::array_lengthof(CategoryNameTable) - 1;
+ return llvm::size(CategoryNameTable) - 1;
}
/// getCategoryNameFromID - Given a category ID, return the name of the
/// DWARF.
Optional<unsigned>
getDWARFAddressSpace(unsigned AddressSpace) const override {
- if (AddressSpace >= llvm::array_lengthof(NVPTXDWARFAddrSpaceMap) ||
+ if (AddressSpace >= llvm::size(NVPTXDWARFAddrSpaceMap) ||
NVPTXDWARFAddrSpaceMap[AddressSpace] < 0)
return llvm::None;
return NVPTXDWARFAddrSpaceMap[AddressSpace];
assert(IsSanitizerScope);
assert(Checked.size() > 0);
assert(CheckHandler >= 0 &&
- size_t(CheckHandler) < llvm::array_lengthof(SanitizerHandlers));
+ size_t(CheckHandler) < llvm::size(SanitizerHandlers));
const StringRef CheckName = SanitizerHandlers[CheckHandler].Name;
llvm::Value *FatalCond = nullptr;
&CGM.getContext().Idents.get("count")
};
Selector FastEnumSel =
- CGM.getContext().Selectors.getSelector(llvm::array_lengthof(II), &II[0]);
+ CGM.getContext().Selectors.getSelector(llvm::size(II), &II[0]);
QualType ItemsTy =
getContext().getConstantArrayType(getContext().getObjCIdType(),
options::OPT_o, options::OPT_MD, options::OPT_MMD, options::OPT_M,
options::OPT_MM, options::OPT_MF, options::OPT_MG, options::OPT_MJ,
options::OPT_MQ, options::OPT_MT, options::OPT_MV};
- for (unsigned i = 0, e = llvm::array_lengthof(OutputOpts); i != e; ++i) {
+ for (unsigned i = 0, e = llvm::size(OutputOpts); i != e; ++i) {
if (TranslatedArgs->hasArg(OutputOpts[i]))
TranslatedArgs->eraseArg(OutputOpts[i]);
}
{"flang", "--driver-mode=flang"},
};
- for (size_t i = 0; i < llvm::array_lengthof(DriverSuffixes); ++i) {
+ for (size_t i = 0; i < llvm::size(DriverSuffixes); ++i) {
StringRef Suffix(DriverSuffixes[i].Suffix);
if (ProgName.endswith(Suffix)) {
Pos = ProgName.size() - Suffix.size();
"TVOS_DEPLOYMENT_TARGET",
"WATCHOS_DEPLOYMENT_TARGET",
};
- static_assert(llvm::array_lengthof(EnvVars) == Darwin::LastDarwinPlatform + 1,
+ static_assert(llvm::size(EnvVars) == Darwin::LastDarwinPlatform + 1,
"Missing platform");
for (const auto &I : llvm::enumerate(llvm::makeArrayRef(EnvVars))) {
if (char *Env = ::getenv(I.value()))
Targets[Darwin::TvOS] = "";
} else {
// Don't allow conflicts in any other platform.
- unsigned FirstTarget = llvm::array_lengthof(Targets);
- for (unsigned I = 0; I != llvm::array_lengthof(Targets); ++I) {
+ unsigned FirstTarget = llvm::size(Targets);
+ for (unsigned I = 0; I != llvm::size(Targets); ++I) {
if (Targets[I].empty())
continue;
- if (FirstTarget == llvm::array_lengthof(Targets))
+ if (FirstTarget == llvm::size(Targets))
FirstTarget = I;
else
TheDriver.Diag(diag::err_drv_conflicting_deployment_targets)
#include "clang/Driver/Types.def"
#undef TYPE
};
-static const unsigned numTypes = llvm::array_lengthof(TypeInfos);
+static const unsigned numTypes = llvm::size(TypeInfos);
static const TypeInfo &getInfo(unsigned id) {
assert(id > 0 && id - 1 < numTypes && "Invalid Type ID.");
} else if (Tok.isLiteral() && !Tok.needsCleaning() &&
Tok.getLiteralData()) {
OS.write(Tok.getLiteralData(), Tok.getLength());
- } else if (Tok.getLength() < llvm::array_lengthof(Buffer)) {
+ } else if (Tok.getLength() < llvm::size(Buffer)) {
const char *TokPtr = Buffer;
unsigned Len = PP.getSpelling(Tok, TokPtr);
OS.write(TokPtr, Len);
ArgsUnion Args[] = {Language.get(), DefinedInExpr.get(),
GeneratedDeclaration};
Attrs.addNew(&ExternalSourceSymbol, SourceRange(Loc, T.getCloseLocation()),
- ScopeName, ScopeLoc, Args, llvm::array_lengthof(Args), Syntax);
+ ScopeName, ScopeLoc, Args, llvm::size(Args), Syntax);
}
/// Parse the contents of the "objc_bridge_related" attribute.
ArgsUnion Args[] = {SwiftType};
Attrs.addNew(&AttrName, SourceRange(AttrNameLoc, T.getCloseLocation()),
- ScopeName, ScopeLoc, Args, llvm::array_lengthof(Args), Syntax);
+ ScopeName, ScopeLoc, Args, llvm::size(Args), Syntax);
}
if (DKind == OMPD_unknown)
return OMPD_unknown;
- for (unsigned I = 0; I < llvm::array_lengthof(F); ++I) {
+ for (unsigned I = 0; I < llvm::size(F); ++I) {
if (DKind != F[I][0])
continue;
// is already used (consider a function returning a function pointer) or too
// small (function with too many parameters), go to the heap.
if (!TheDeclarator.InlineStorageUsed &&
- NumParams <= llvm::array_lengthof(TheDeclarator.InlineParams)) {
+ NumParams <= llvm::size(TheDeclarator.InlineParams)) {
I.Fun.Params = TheDeclarator.InlineParams;
new (I.Fun.Params) ParamInfo[NumParams];
I.Fun.DeleteParams = false;
// Allocate storage for bindings and stash them away.
if (Bindings.size()) {
if (!InlineStorageUsed &&
- Bindings.size() <= llvm::array_lengthof(InlineBindings)) {
+ Bindings.size() <= llvm::size(InlineBindings)) {
BindingGroup.Bindings = InlineBindings;
BindingGroup.DeleteBindings = false;
InlineStorageUsed = true;
const ParsedAttrInfo &ParsedAttrInfo::get(const AttributeCommonInfo &A) {
// If we have a ParsedAttrInfo for this ParsedAttr then return that.
- if ((size_t)A.getParsedKind() < llvm::array_lengthof(AttrInfoMap))
+ if ((size_t)A.getParsedKind() < llvm::size(AttrInfoMap))
return *AttrInfoMap[A.getParsedKind()];
// If this is an ignored attribute then return an appropriate ParsedAttrInfo.
"extern", "inline", "static", "typedef"
};
- const unsigned NumCTypeSpecs = llvm::array_lengthof(CTypeSpecs);
+ const unsigned NumCTypeSpecs = llvm::size(CTypeSpecs);
for (unsigned I = 0; I != NumCTypeSpecs; ++I)
Consumer.addKeywordResult(CTypeSpecs[I]);
static const char *const CXXExprs[] = {
"delete", "new", "operator", "throw", "typeid"
};
- const unsigned NumCXXExprs = llvm::array_lengthof(CXXExprs);
+ const unsigned NumCXXExprs = llvm::size(CXXExprs);
for (unsigned I = 0; I != NumCXXExprs; ++I)
Consumer.addKeywordResult(CXXExprs[I]);
// Statements.
static const char *const CStmts[] = {
"do", "else", "for", "goto", "if", "return", "switch", "while" };
- const unsigned NumCStmts = llvm::array_lengthof(CStmts);
+ const unsigned NumCStmts = llvm::size(CStmts);
for (unsigned I = 0; I != NumCStmts; ++I)
Consumer.addKeywordResult(CStmts[I]);
SemaRef.Context.UnsignedIntTy, SemaRef.Context.UnsignedLongTy,
SemaRef.Context.UnsignedLongLongTy, SemaRef.Context.UnsignedInt128Ty
};
- const unsigned NumTypes = llvm::array_lengthof(Types);
+ const unsigned NumTypes = llvm::size(Types);
QualType SizeType;
for (unsigned I = 0; I != NumTypes; ++I)
if (Size->getBitWidth() == SemaRef.Context.getIntWidth(Types[I])) {
// <rdar://problem/11949235>
template<class T, unsigned N>
-inline unsigned array_lengthof(T (&)[N]) {
+inline unsigned size(T (&)[N]) {
return N;
}
void testNonTypeTemplateInstantiation() {
const char *S[] = { "a", "b" };
- clang_analyzer_eval(array_lengthof(S) == 2);
+ clang_analyzer_eval(size(S) == 2);
#ifndef NO_INLINE
// expected-warning@-2 {{TRUE}}
#else
template<int N> struct integral_c { };
template <typename T, int N>
- integral_c<N> array_lengthof(T (&x)[N]) { return integral_c<N>(); } // expected-note 2{{candidate template ignored: could not match 'T[N]' against 'const Data<}}
+ integral_c<N> size(T (&x)[N]) { return integral_c<N>(); } // expected-note 2{{candidate template ignored: could not match 'T[N]' against 'const Data<}}
template<typename T>
struct Data {
const Data<float*> Description<float*>::data[];
void test() {
- integral_c<1> ic1 = array_lengthof(Description<int>::data);
- (void)sizeof(array_lengthof(Description<float>::data));
+ integral_c<1> ic1 = size(Description<int>::data);
+ (void)sizeof(size(Description<float>::data));
- (void)sizeof(array_lengthof( // expected-error{{no matching function for call to 'array_lengthof'}}
+ (void)sizeof(size( // expected-error{{no matching function for call to 'size'}}
Description<int*>::data // expected-note{{in instantiation of static data member 'PR7985::Description<int *>::data' requested here}}
));
- array_lengthof(Description<float*>::data); // expected-error{{no matching function for call to 'array_lengthof'}}
+ size(Description<float*>::data); // expected-error{{no matching function for call to 'size'}}
}
}
const char *Sources[] = {
"//", "///", "//!", "///<", "//!<"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
const char *Sources[] = {
"/**/", "/***/", "/*!*/", "/**<*/", "/*!<*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// Meow\n", "// Meow\r\n", "//! Meow\r",
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"/* Meow*/", "/** Meow*/", "/*! Meow*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// Aaa\\\r" " Bbb\\ \r" " Ccc?" "?/\r"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
// A command marker followed by comment end.
TEST_F(CommentLexerTest, DoxygenCommand1) {
const char *Sources[] = { "//@", "///@", "//!@" };
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
// A command marker followed by comment end.
TEST_F(CommentLexerTest, DoxygenCommand2) {
const char *Sources[] = { "/*@*/", "/**@*/", "/*!@*/"};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
// A command marker followed by comment end.
TEST_F(CommentLexerTest, DoxygenCommand3) {
const char *Sources[] = { "/*\\*/", "/**\\*/" };
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"::", ""
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
- ASSERT_EQ(array_lengthof(Text), Toks.size());
+ ASSERT_EQ(size(Text), Toks.size());
for (size_t j = 0, e = Toks.size(); j != e; j++) {
if(Toks[j].is(tok::text)) {
"/** \\verbatim\\endverbatim*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"/** Meow \\verbatim aaa \\endverbatim*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"/** Meow \\verbatim aaa */"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"/** \\fn*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"/** \\fn void *foo(const char *zzz = \"\\$\");*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// <img "
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// <img src "
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// <img src ="
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// <img src = \'"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// <img src=\'val\\\"\\'val\'"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// <img src=\'val\\\"\\'val\'>"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// <img />"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// <img / Aaa"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"// ="
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
std::vector<Token> Toks;
lexString(Sources[i], Toks);
"*/"),
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"// Bbb\n")
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"// Bbb\n"),
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"// Bbb\n"),
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"// Bbb\n"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"// Bbb\n"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"// <a >"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 1));
"// <br />"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 1));
"// <a href >",
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 1));
"// <a href=\"bbb\">",
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 1));
"// </a >"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 1));
" *\\endverbatim*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 1));
" * \\endverbatim*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
" * \\endverbatim*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
" * Bbb\n"
" * \\endverbatim*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"// \\fn\n"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"/** \\fn void *foo(const char *zzz = \"\\$\");*/"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"/// @deprecated\n"
};
- for (size_t i = 0, e = array_lengthof(Sources); i != e; i++) {
+ for (size_t i = 0, e = size(Sources); i != e; i++) {
FullComment *FC = parseString(Sources[i]);
ASSERT_TRUE(HasChildCount(FC, 2));
"()", "[]"
};
- for (unsigned i = 0, e = llvm::array_lengthof(OperatorNames); i != e; ++i) {
+ for (unsigned i = 0, e = llvm::size(OperatorNames); i != e; ++i) {
SmallString<128> Code;
Code.append("struct Z { void operator");
Code.append(OperatorNames[i]);
"~", "!", "++", "--", "->"
};
- for (unsigned i = 0, e = llvm::array_lengthof(OperatorNames); i != e; ++i) {
+ for (unsigned i = 0, e = llvm::size(OperatorNames); i != e; ++i) {
SmallString<128> Code;
Code.append("struct Z { void operator");
Code.append(OperatorNames[i]);
// Adjust the given command line arguments to ensure that any positional
// arguments in them are stripped.
const char *Argv[] = {"--", "somefile.cpp", "-fsyntax-only", "-DDEF3"};
- int Argc = llvm::array_lengthof(Argv);
+ int Argc = llvm::size(Argv);
std::string ErrorMessage;
std::unique_ptr<CompilationDatabase> Database =
FixedCompilationDatabase::loadFromCommandLine(Argc, Argv, ErrorMessage);
void MergeChunk::addSection(COFFLinkerContext &ctx, SectionChunk *c) {
assert(isPowerOf2_32(c->getAlignment()));
uint8_t p2Align = llvm::Log2_32(c->getAlignment());
- assert(p2Align < array_lengthof(ctx.mergeChunkInstances));
+ assert(p2Align < size(ctx.mergeChunkInstances));
auto *&mc = ctx.mergeChunkInstances[p2Align];
if (!mc)
mc = make<MergeChunk>(c->getAlignment());
kNumFormats,
"All formats must have a corresponding info entry.");
-static uint32_t g_num_format_infos = llvm::array_lengthof(g_format_infos);
+static uint32_t g_num_format_infos = llvm::size(g_format_infos);
static bool GetFormatFromFormatChar(char format_char, Format &format) {
for (uint32_t i = 0; i < g_num_format_infos; ++i) {
EV_SET(&in_events[i++], fd.first, EVFILT_READ, EV_ADD, 0, 0, 0);
num_events = kevent(loop.m_kqueue, in_events.data(), in_events.size(),
- out_events, llvm::array_lengthof(out_events), nullptr);
+ out_events, llvm::size(out_events), nullptr);
if (num_events < 0) {
if (errno == EINTR) {
.count()
: INFINITE;
DWORD wait_result =
- ::WaitForMultipleObjects(llvm::array_lengthof(m_event_handles),
+ ::WaitForMultipleObjects(llvm::size(m_event_handles),
m_event_handles, FALSE, milliseconds);
// All of the events are manual reset events, so make sure we reset them
// to non-signalled.
"breakpoint set --name '%1'"}};
// clang-format on
- size_t num_regexes = llvm::array_lengthof(break_regexes);
+ size_t num_regexes = llvm::size(break_regexes);
std::unique_ptr<CommandObjectRegexCommand> break_regex_cmd_up(
new CommandObjectRegexCommand(
}};
static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+ llvm::size(g_register_infos);
const lldb_private::RegisterInfo *
ABIMacOSX_arm::GetRegisterInfoArray(uint32_t &count) {
llvm::ArrayRef<addr_t>::iterator ai = args.begin(), ae = args.end();
- for (size_t i = 0; i < llvm::array_lengthof(reg_names); ++i) {
+ for (size_t i = 0; i < llvm::size(reg_names); ++i) {
if (ai == ae)
break;
}};
static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+ llvm::size(g_register_infos);
const lldb_private::RegisterInfo *
ABISysV_arm::GetRegisterInfoArray(uint32_t &count) {
llvm::ArrayRef<addr_t>::iterator ai = args.begin(), ae = args.end();
- for (size_t i = 0; i < llvm::array_lengthof(reg_names); ++i) {
+ for (size_t i = 0; i < llvm::size(reg_names); ++i) {
if (ai == ae)
break;
};
static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+ llvm::size(g_register_infos);
const lldb_private::RegisterInfo *
ABISysV_mips::GetRegisterInfoArray(uint32_t &count) {
llvm::ArrayRef<addr_t>::iterator ai = args.begin(), ae = args.end();
// Write arguments to registers
- for (size_t i = 0; i < llvm::array_lengthof(reg_names); ++i) {
+ for (size_t i = 0; i < llvm::size(reg_names); ++i) {
if (ai == ae)
break;
};
static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos_mips64);
+ llvm::size(g_register_infos_mips64);
const lldb_private::RegisterInfo *
ABISysV_mips64::GetRegisterInfoArray(uint32_t &count) {
}};
static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+ llvm::size(g_register_infos);
const lldb_private::RegisterInfo *
ABISysV_ppc::GetRegisterInfoArray(uint32_t &count) {
const lldb_private::RegisterInfo *
ABISysV_ppc64::GetRegisterInfoArray(uint32_t &count) {
if (GetByteOrder() == lldb::eByteOrderLittle) {
- count = llvm::array_lengthof(g_register_infos_ppc64le);
+ count = llvm::size(g_register_infos_ppc64le);
return g_register_infos_ppc64le;
} else {
- count = llvm::array_lengthof(g_register_infos_ppc64);
+ count = llvm::size(g_register_infos_ppc64);
return g_register_infos_ppc64;
}
}
};
static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+ llvm::size(g_register_infos);
const lldb_private::RegisterInfo *
ABISysV_s390x::GetRegisterInfoArray(uint32_t &count) {
const uint32_t magicks[] = { llvm::MachO::MH_MAGIC_64, llvm::MachO::MH_MAGIC, llvm::MachO::MH_CIGAM, llvm::MachO::MH_CIGAM_64};
bool found_matching_pattern = false;
- for (size_t i = 0; i < llvm::array_lengthof (magicks); i++)
+ for (size_t i = 0; i < llvm::size (magicks); i++)
if (::memcmp (&header.magic, &magicks[i], sizeof (uint32_t)) == 0)
found_matching_pattern = true;
&EmulateInstructionARM::EmulateRFE, "rfe{<amode>} <Rn>{!}"}
};
- static const size_t k_num_arm_opcodes = llvm::array_lengthof(g_arm_opcodes);
+ static const size_t k_num_arm_opcodes = llvm::size(g_arm_opcodes);
for (size_t i = 0; i < k_num_arm_opcodes; ++i) {
if ((g_arm_opcodes[i].mask & opcode) == g_arm_opcodes[i].value &&
&EmulateInstructionARM::EmulateUXTH, "uxth<c>.w <Rd>,<Rm>{,<rotation>}"},
};
- const size_t k_num_thumb_opcodes = llvm::array_lengthof(g_thumb_opcodes);
+ const size_t k_num_thumb_opcodes = llvm::size(g_thumb_opcodes);
for (size_t i = 0; i < k_num_thumb_opcodes; ++i) {
if ((g_thumb_opcodes[i].mask & opcode) == g_thumb_opcodes[i].value &&
(g_thumb_opcodes[i].variants & arm_isa) != 0)
LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionARM64, InstructionARM64)
static bool LLDBTableGetRegisterInfo(uint32_t reg_num, RegisterInfo ®_info) {
- if (reg_num >= llvm::array_lengthof(g_register_infos_arm64_le))
+ if (reg_num >= llvm::size(g_register_infos_arm64_le))
return false;
reg_info = g_register_infos_arm64_le[reg_num];
return true;
"TBNZ <R><t>, #<imm>, <label>"},
};
- static const size_t k_num_arm_opcodes = llvm::array_lengthof(g_opcodes);
+ static const size_t k_num_arm_opcodes = llvm::size(g_opcodes);
for (size_t i = 0; i < k_num_arm_opcodes; ++i) {
if ((g_opcodes[i].mask & opcode) == g_opcodes[i].value)
{"JALRS_MM", &EmulateInstructionMIPS::Emulate_JALRS, "JALRS rt, rs"},
};
- static const size_t k_num_mips_opcodes = llvm::array_lengthof(g_opcodes);
+ static const size_t k_num_mips_opcodes = llvm::size(g_opcodes);
for (size_t i = 0; i < k_num_mips_opcodes; ++i) {
if (!strcasecmp(g_opcodes[i].op_name, op_name))
{"BZ_V", &EmulateInstructionMIPS64::Emulate_BZV, "BZ.V wt,s16"},
};
- static const size_t k_num_mips_opcodes = llvm::array_lengthof(g_opcodes);
+ static const size_t k_num_mips_opcodes = llvm::size(g_opcodes);
for (size_t i = 0; i < k_num_mips_opcodes; ++i) {
if (!strcasecmp(g_opcodes[i].op_name, op_name))
}
static bool LLDBTableGetRegisterInfo(uint32_t reg_num, RegisterInfo ®_info) {
- if (reg_num >= llvm::array_lengthof(g_register_infos_ppc64le))
+ if (reg_num >= llvm::size(g_register_infos_ppc64le))
return false;
reg_info = g_register_infos_ppc64le[reg_num];
return true;
"addi RT, RA, SI"},
{0xfc000003, 0xe8000000, &EmulateInstructionPPC64::EmulateLD,
"ld RT, DS(RA)"}};
- static const size_t k_num_ppc_opcodes = llvm::array_lengthof(g_opcodes);
+ static const size_t k_num_ppc_opcodes = llvm::size(g_opcodes);
for (size_t i = 0; i < k_num_ppc_opcodes; ++i) {
if ((g_opcodes[i].mask & opcode) == g_opcodes[i].value)
// array into a template table, and populate the DispatchFunction
// map from there.
- for (size_t i = 0; i != llvm::array_lengthof(g_dispatch_functions); i++) {
+ for (size_t i = 0; i != llvm::size(g_dispatch_functions); i++) {
ConstString name_const_str(g_dispatch_functions[i].name);
const Symbol *msgSend_symbol =
m_objc_module_sp->FindFirstSymbolWithNameAndType(name_const_str,
}
// Similarly, cache the addresses of the "optimized dispatch" function.
- for (size_t i = 0; i != llvm::array_lengthof(g_opt_dispatch_names); i++) {
+ for (size_t i = 0; i != llvm::size(g_opt_dispatch_names); i++) {
ConstString name_const_str(g_opt_dispatch_names[i]);
const Symbol *msgSend_symbol =
m_objc_module_sp->FindFirstSymbolWithNameAndType(name_const_str,
}
llvm::StringRef ObjectFilePECOFF::GetSectionName(const section_header_t §) {
- llvm::StringRef hdr_name(sect.name, llvm::array_lengthof(sect.name));
+ llvm::StringRef hdr_name(sect.name, llvm::size(sect.name));
hdr_name = hdr_name.split('\0').first;
if (hdr_name.consume_front("/")) {
lldb::offset_t stroff;
lldb_r8_x86_64, lldb_r9_x86_64, lldb_r10_x86_64, lldb_r11_x86_64,
lldb_r12_x86_64, lldb_r13_x86_64, lldb_r14_x86_64, lldb_r15_x86_64};
- if (machine_reg >= llvm::array_lengthof(machine_to_lldb_register))
+ if (machine_reg >= llvm::size(machine_to_lldb_register))
return LLDB_INVALID_REGNUM;
return machine_to_lldb_register[machine_reg];
lldb_xmm12_x86_64, lldb_xmm13_x86_64, lldb_xmm14_x86_64,
lldb_xmm15_x86_64};
- if (xmm_reg >= llvm::array_lengthof(xmm_to_lldb_register))
+ if (xmm_reg >= llvm::size(xmm_to_lldb_register))
return LLDB_INVALID_REGNUM;
return xmm_to_lldb_register[xmm_reg];
"libSystem.B.dylib"};
FileSpecList bp_modules;
- for (size_t i = 0; i < llvm::array_lengthof(g_bp_modules); i++) {
+ for (size_t i = 0; i < llvm::size(g_bp_modules); i++) {
const char *bp_module = g_bp_modules[i];
bp_modules.EmplaceBack(bp_module);
}
bool hardware = false;
LazyBool skip_prologue = eLazyBoolNo;
bp_sp = target.CreateBreakpoint(&bp_modules, nullptr, g_bp_names,
- llvm::array_lengthof(g_bp_names),
+ llvm::size(g_bp_names),
eFunctionNameTypeFull, eLanguageTypeUnknown,
0, skip_prologue, internal, hardware);
bp_sp->SetBreakpointKind("thread-creation");
exc_exception, exc_fsr, exc_far,
};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = llvm::size(g_register_infos);
RegisterContextDarwin_arm::RegisterContextDarwin_arm(
Thread &thread, uint32_t concrete_frame_idx)
}
// Number of registers in each register set
-const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
-const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
-const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
+const size_t k_num_gpr_registers = llvm::size(g_gpr_regnums);
+const size_t k_num_fpu_registers = llvm::size(g_fpu_regnums);
+const size_t k_num_exc_registers = llvm::size(g_exc_regnums);
// Register set definitions. The first definitions at register set index of
// zero is for all registers, followed by other registers sets. The register
{"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
{"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
-const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
+const size_t k_num_regsets = llvm::size(g_reg_sets);
size_t RegisterContextDarwin_arm::GetRegisterSetCount() {
return k_num_regsets;
static uint32_t g_exc_regnums[] = {exc_far, exc_esr, exc_exception};
static size_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos_arm64_le);
+ llvm::size(g_register_infos_arm64_le);
RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(
Thread &thread, uint32_t concrete_frame_idx)
}
// Number of registers in each register set
-const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
-const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
-const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
+const size_t k_num_gpr_registers = llvm::size(g_gpr_regnums);
+const size_t k_num_fpu_registers = llvm::size(g_fpu_regnums);
+const size_t k_num_exc_registers = llvm::size(g_exc_regnums);
// Register set definitions. The first definitions at register set index of
// zero is for all registers, followed by other registers sets. The register
{"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
{"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
-const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
+const size_t k_num_regsets = llvm::size(g_reg_sets);
size_t RegisterContextDarwin_arm64::GetRegisterSetCount() {
return k_num_regsets;
nullptr,
}};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = llvm::size(g_register_infos);
RegisterContextDarwin_i386::RegisterContextDarwin_i386(
Thread &thread, uint32_t concrete_frame_idx)
static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
// Number of registers in each register set
-const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
-const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
-const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
+const size_t k_num_gpr_registers = llvm::size(g_gpr_regnums);
+const size_t k_num_fpu_registers = llvm::size(g_fpu_regnums);
+const size_t k_num_exc_registers = llvm::size(g_exc_regnums);
// Register set definitions. The first definitions at register set index of
// zero is for all registers, followed by other registers sets. The register
{"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
{"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
-const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
+const size_t k_num_regsets = llvm::size(g_reg_sets);
size_t RegisterContextDarwin_i386::GetRegisterSetCount() {
return k_num_regsets;
nullptr,
}};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = llvm::size(g_register_infos);
RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64(
Thread &thread, uint32_t concrete_frame_idx)
static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
// Number of registers in each register set
-const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
-const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
-const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
+const size_t k_num_gpr_registers = llvm::size(g_gpr_regnums);
+const size_t k_num_fpu_registers = llvm::size(g_fpu_regnums);
+const size_t k_num_exc_registers = llvm::size(g_exc_regnums);
// Register set definitions. The first definitions at register set index of
// zero is for all registers, followed by other registers sets. The register
{"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
{"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
-const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
+const size_t k_num_regsets = llvm::size(g_reg_sets);
size_t RegisterContextDarwin_x86_64::GetRegisterSetCount() {
return k_num_regsets;
}
uint32_t RegisterContextWindows_i386::GetRegisterCount() const {
- return llvm::array_lengthof(g_register_infos_i386);
+ return llvm::size(g_register_infos_i386);
}
uint32_t RegisterContextWindows_i386::GetUserRegisterCount() const {
- return llvm::array_lengthof(g_register_infos_i386);
+ return llvm::size(g_register_infos_i386);
}
size_t RegisterContextWindows_i386::GetGPRSize() const { return sizeof(GPR); }
}
uint32_t RegisterContextWindows_x86_64::GetRegisterCount() const {
- return llvm::array_lengthof(g_register_infos_x86_64);
+ return llvm::size(g_register_infos_x86_64);
}
uint32_t RegisterContextWindows_x86_64::GetUserRegisterCount() const {
- return llvm::array_lengthof(g_register_infos_x86_64);
+ return llvm::size(g_register_infos_x86_64);
}
size_t RegisterContextWindows_x86_64::GetGPRSize() const { return sizeof(GPR); }
static const RegisterSet g_reg_sets_WoW64[] = {
{"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_WoW64) - 1, g_gpr_regnums_WoW64},
+ llvm::size(g_gpr_regnums_WoW64) - 1, g_gpr_regnums_WoW64},
};
enum { k_num_register_sets = 1 };
static const RegisterSet g_reg_sets_arm[] = {
{"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_arm) - 1, g_gpr_regnums_arm},
+ llvm::size(g_gpr_regnums_arm) - 1, g_gpr_regnums_arm},
{"Floating Point Registers", "fpr",
- llvm::array_lengthof(g_fpr_regnums_arm) - 1, g_fpr_regnums_arm},
+ llvm::size(g_fpr_regnums_arm) - 1, g_fpr_regnums_arm},
};
enum { k_num_register_sets = 2 };
static const RegisterSet g_reg_sets_arm64[] = {
{"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_arm64) - 1, g_gpr_regnums_arm64},
+ llvm::size(g_gpr_regnums_arm64) - 1, g_gpr_regnums_arm64},
{"Floating Point Registers", "fpr",
- llvm::array_lengthof(g_fpr_regnums_arm64) - 1, g_fpr_regnums_arm64},
+ llvm::size(g_fpr_regnums_arm64) - 1, g_fpr_regnums_arm64},
};
enum { k_num_register_sets = 2 };
static const RegisterSet g_reg_sets_i386[] = {
{"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_i386) - 1, g_gpr_regnums_i386},
+ llvm::size(g_gpr_regnums_i386) - 1, g_gpr_regnums_i386},
};
enum { k_num_register_sets = 1 };
static const RegisterSet g_reg_sets_x86_64[] = {
{"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_x86_64) - 1, g_gpr_regnums_x86_64},
+ llvm::size(g_gpr_regnums_x86_64) - 1, g_gpr_regnums_x86_64},
{"Floating Point Registers", "fpr",
- llvm::array_lengthof(g_fpr_regnums_x86_64) - 1, g_fpr_regnums_x86_64}};
+ llvm::size(g_fpr_regnums_x86_64) - 1, g_fpr_regnums_x86_64}};
enum { k_num_register_sets = 2 };
#include "Plugins/Process/Utility/RegisterInfos_arm.h"
#undef DECLARE_REGISTER_INFOS_ARM_STRUCT
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos_arm);
+static size_t k_num_register_infos = llvm::size(g_register_infos_arm);
// Array of lldb register numbers used to define the set of all General Purpose
// Registers
RegisterSet g_register_sets[] = {
{"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_reg_indices), g_gpr_reg_indices},
- {"Floating Point Registers", "fpu", llvm::array_lengthof(g_fpu_reg_indices),
+ llvm::size(g_gpr_reg_indices), g_gpr_reg_indices},
+ {"Floating Point Registers", "fpu", llvm::size(g_fpu_reg_indices),
g_fpu_reg_indices},
};
RegisterContextWindows_arm::~RegisterContextWindows_arm() {}
size_t RegisterContextWindows_arm::GetRegisterCount() {
- return llvm::array_lengthof(g_register_infos_arm);
+ return llvm::size(g_register_infos_arm);
}
const RegisterInfo *
}
size_t RegisterContextWindows_arm::GetRegisterSetCount() {
- return llvm::array_lengthof(g_register_sets);
+ return llvm::size(g_register_sets);
}
const RegisterSet *RegisterContextWindows_arm::GetRegisterSet(size_t reg_set) {
#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
static size_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos_arm64_le);
+ llvm::size(g_register_infos_arm64_le);
// Array of lldb register numbers used to define the set of all General Purpose
// Registers
RegisterSet g_register_sets[] = {
{"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_reg_indices), g_gpr_reg_indices},
- {"Floating Point Registers", "fpu", llvm::array_lengthof(g_fpu_reg_indices),
+ llvm::size(g_gpr_reg_indices), g_gpr_reg_indices},
+ {"Floating Point Registers", "fpu", llvm::size(g_fpu_reg_indices),
g_fpu_reg_indices},
};
RegisterContextWindows_arm64::~RegisterContextWindows_arm64() {}
size_t RegisterContextWindows_arm64::GetRegisterCount() {
- return llvm::array_lengthof(g_register_infos_arm64_le);
+ return llvm::size(g_register_infos_arm64_le);
}
const RegisterInfo *
}
size_t RegisterContextWindows_arm64::GetRegisterSetCount() {
- return llvm::array_lengthof(g_register_sets);
+ return llvm::size(g_register_sets);
}
const RegisterSet *
{DEFINE_FPU_XMM(xmm15)}
};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = llvm::size(g_register_infos);
// Array of lldb register numbers used to define the set of all General Purpose
// Registers
RegisterSet g_register_sets[] = {
{"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_reg_indices), g_gpr_reg_indices},
+ llvm::size(g_gpr_reg_indices), g_gpr_reg_indices},
{"Floating Point Registers", "fpu",
- llvm::array_lengthof(g_fpu_reg_indices), g_fpu_reg_indices}};
+ llvm::size(g_fpu_reg_indices), g_fpu_reg_indices}};
}
// Constructors and Destructors
RegisterContextWindows_x64::~RegisterContextWindows_x64() {}
size_t RegisterContextWindows_x64::GetRegisterCount() {
- return llvm::array_lengthof(g_register_infos);
+ return llvm::size(g_register_infos);
}
const RegisterInfo *
}
size_t RegisterContextWindows_x64::GetRegisterSetCount() {
- return llvm::array_lengthof(g_register_sets);
+ return llvm::size(g_register_sets);
}
const RegisterSet *RegisterContextWindows_x64::GetRegisterSet(size_t reg_set) {
nullptr,
},
};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = llvm::size(g_register_infos);
// Array of lldb register numbers used to define the set of all General Purpose
// Registers
RegisterSet g_register_sets[] = {
{"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_reg_indices), g_gpr_reg_indices},
+ llvm::size(g_gpr_reg_indices), g_gpr_reg_indices},
};
}
RegisterContextWindows_x86::~RegisterContextWindows_x86() {}
size_t RegisterContextWindows_x86::GetRegisterCount() {
- return llvm::array_lengthof(g_register_infos);
+ return llvm::size(g_register_infos);
}
const RegisterInfo *
}
size_t RegisterContextWindows_x86::GetRegisterSetCount() {
- return llvm::array_lengthof(g_register_sets);
+ return llvm::size(g_register_sets);
}
const RegisterSet *RegisterContextWindows_x86::GetRegisterSet(size_t reg_set) {
DEF_Q(14),
DEF_Q(15)};
-constexpr size_t k_num_reg_infos = llvm::array_lengthof(g_reg_infos);
+constexpr size_t k_num_reg_infos = llvm::size(g_reg_infos);
// ARM general purpose registers.
const uint32_t g_gpr_regnums[] = {
};
// Skip the last LLDB_INVALID_REGNUM in each count below by subtracting 1
-constexpr size_t k_num_gpr_regs = llvm::array_lengthof(g_gpr_regnums) - 1;
-constexpr size_t k_num_fpu_regs = llvm::array_lengthof(g_fpu_regnums) - 1;
+constexpr size_t k_num_gpr_regs = llvm::size(g_gpr_regnums) - 1;
+constexpr size_t k_num_fpu_regs = llvm::size(g_fpu_regnums) - 1;
static RegisterSet g_reg_sets[] = {
{"General Purpose Registers", "gpr", k_num_gpr_regs, g_gpr_regnums},
{"Floating Point Registers", "fpu", k_num_fpu_regs, g_fpu_regnums},
};
-constexpr size_t k_num_reg_sets = llvm::array_lengthof(g_reg_sets);
+constexpr size_t k_num_reg_sets = llvm::size(g_reg_sets);
RegisterContextMinidump_ARM::RegisterContextMinidump_ARM(
lldb_private::Thread &thread, const DataExtractor &data, bool apple)
: RegisterContext(thread, 0), m_apple(apple) {
lldb::offset_t offset = 0;
m_regs.context_flags = data.GetU32(&offset);
- for (unsigned i = 0; i < llvm::array_lengthof(m_regs.r); ++i)
+ for (unsigned i = 0; i < llvm::size(m_regs.r); ++i)
m_regs.r[i] = data.GetU32(&offset);
m_regs.cpsr = data.GetU32(&offset);
m_regs.fpscr = data.GetU64(&offset);
- for (unsigned i = 0; i < llvm::array_lengthof(m_regs.d); ++i)
+ for (unsigned i = 0; i < llvm::size(m_regs.d); ++i)
m_regs.d[i] = data.GetU64(&offset);
lldbassert(k_num_regs == k_num_reg_infos);
}
DEF_H(31),
};
-constexpr size_t k_num_reg_infos = llvm::array_lengthof(g_reg_infos);
+constexpr size_t k_num_reg_infos = llvm::size(g_reg_infos);
// ARM64 general purpose registers.
const uint32_t g_gpr_regnums[] = {
};
// Skip the last LLDB_INVALID_REGNUM in each count below by subtracting 1
-constexpr size_t k_num_gpr_regs = llvm::array_lengthof(g_gpr_regnums) - 1;
-constexpr size_t k_num_fpu_regs = llvm::array_lengthof(g_fpu_regnums) - 1;
+constexpr size_t k_num_gpr_regs = llvm::size(g_gpr_regnums) - 1;
+constexpr size_t k_num_fpu_regs = llvm::size(g_fpu_regnums) - 1;
static RegisterSet g_reg_sets[] = {
{"General Purpose Registers", "gpr", k_num_gpr_regs, g_gpr_regnums},
{"Floating Point Registers", "fpu", k_num_fpu_regs, g_fpu_regnums},
};
-constexpr size_t k_num_reg_sets = llvm::array_lengthof(g_reg_sets);
+constexpr size_t k_num_reg_sets = llvm::size(g_reg_sets);
RegisterContextMinidump_ARM64::RegisterContextMinidump_ARM64(
lldb_private::Thread &thread, const DataExtractor &data)
};
void ArchSpec::ListSupportedArchNames(StringList &list) {
- for (uint32_t i = 0; i < llvm::array_lengthof(g_core_definitions); ++i)
+ for (uint32_t i = 0; i < llvm::size(g_core_definitions); ++i)
list.AppendString(g_core_definitions[i].name);
}
void ArchSpec::AutoComplete(CompletionRequest &request) {
- for (uint32_t i = 0; i < llvm::array_lengthof(g_core_definitions); ++i)
+ for (uint32_t i = 0; i < llvm::size(g_core_definitions); ++i)
request.TryCompleteCurrentArg(g_core_definitions[i].name);
}
// clang-format on
static const ArchDefinition g_macho_arch_def = {
- eArchTypeMachO, llvm::array_lengthof(g_macho_arch_entries),
+ eArchTypeMachO, llvm::size(g_macho_arch_entries),
g_macho_arch_entries, "mach-o"};
//===----------------------------------------------------------------------===//
static const ArchDefinition g_elf_arch_def = {
eArchTypeELF,
- llvm::array_lengthof(g_elf_arch_entries),
+ llvm::size(g_elf_arch_entries),
g_elf_arch_entries,
"elf",
};
static const ArchDefinition g_coff_arch_def = {
eArchTypeCOFF,
- llvm::array_lengthof(g_coff_arch_entries),
+ llvm::size(g_coff_arch_entries),
g_coff_arch_entries,
"pe-coff",
};
&g_macho_arch_def, &g_elf_arch_def, &g_coff_arch_def};
static const size_t k_num_arch_definitions =
- llvm::array_lengthof(g_arch_definitions);
+ llvm::size(g_arch_definitions);
//===----------------------------------------------------------------------===//
// Static helper functions.
// Get an architecture definition by name.
static const CoreDefinition *FindCoreDefinition(llvm::StringRef name) {
- for (unsigned int i = 0; i < llvm::array_lengthof(g_core_definitions); ++i) {
+ for (unsigned int i = 0; i < llvm::size(g_core_definitions); ++i) {
if (name.equals_insensitive(g_core_definitions[i].name))
return &g_core_definitions[i];
}
}
static inline const CoreDefinition *FindCoreDefinition(ArchSpec::Core core) {
- if (core < llvm::array_lengthof(g_core_definitions))
+ if (core < llvm::size(g_core_definitions))
return &g_core_definitions[core];
return nullptr;
}
EXPECT_TRUE(success.Success());
WCHAR name[128]{};
- ULONG nameLen = llvm::array_lengthof(name);
+ ULONG nameLen = llvm::size(name);
ULONG langs = 0;
GetUserPreferredUILanguages(MUI_LANGUAGE_NAME, &langs,
reinterpret_cast<PZZWSTR>(&name), &nameLen);
}
}
-/// Find the length of an array.
-template <class T, std::size_t N>
-constexpr inline size_t array_lengthof(T (&)[N]) {
- return N;
-}
-
/// Adapt std::less<T> for array_pod_sort.
template<typename T>
inline int array_pod_sort_comparator(const void *P1, const void *P2) {
explicit in_place_index_t() = default;
};
+template <class C>
+constexpr auto size(const C& c) -> decltype(c.size()) { // NOLINT(readability-identifier-naming)
+ return c.size();
+}
+
+template <class T, std::size_t N>
+constexpr std::size_t size(const T (&array)[N]) noexcept { // NOLINT(readability-identifier-naming)
+ return N;
+}
+
//===----------------------------------------------------------------------===//
// Features from C++20
//===----------------------------------------------------------------------===//
/// promotions or expansions.
bool isTypeLegal(EVT VT) const {
assert(!VT.isSimple() ||
- (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT));
+ (unsigned)VT.getSimpleVT().SimpleTy < size(RegClassForVT));
return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr;
}
if (VT.isExtended()) return Expand;
// If a target-specific SDNode requires legalization, require the target
// to provide custom legalization for it.
- if (Op >= array_lengthof(OpActions[0])) return Custom;
+ if (Op >= size(OpActions[0])) return Custom;
return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op];
}
/// expander for it.
LegalizeAction
getCondCodeAction(ISD::CondCode CC, MVT VT) const {
- assert((unsigned)CC < array_lengthof(CondCodeActions) &&
- ((unsigned)VT.SimpleTy >> 3) < array_lengthof(CondCodeActions[0]) &&
+ assert((unsigned)CC < size(CondCodeActions) &&
+ ((unsigned)VT.SimpleTy >> 3) < size(CondCodeActions[0]) &&
"Table isn't big enough!");
// See setCondCodeAction for how this is encoded.
uint32_t Shift = 4 * (VT.SimpleTy & 0x7);
/// Return the type of registers that this ValueType will eventually require.
MVT getRegisterType(MVT VT) const {
- assert((unsigned)VT.SimpleTy < array_lengthof(RegisterTypeForVT));
+ assert((unsigned)VT.SimpleTy < size(RegisterTypeForVT));
return RegisterTypeForVT[VT.SimpleTy];
}
MVT getRegisterType(LLVMContext &Context, EVT VT) const {
if (VT.isSimple()) {
assert((unsigned)VT.getSimpleVT().SimpleTy <
- array_lengthof(RegisterTypeForVT));
+ size(RegisterTypeForVT));
return RegisterTypeForVT[VT.getSimpleVT().SimpleTy];
}
if (VT.isVector()) {
Optional<MVT> RegisterVT = None) const {
if (VT.isSimple()) {
assert((unsigned)VT.getSimpleVT().SimpleTy <
- array_lengthof(NumRegistersForVT));
+ size(NumRegistersForVT));
return NumRegistersForVT[VT.getSimpleVT().SimpleTy];
}
if (VT.isVector()) {
/// If true, the target has custom DAG combine transformations that it can
/// perform for the specified node.
bool hasTargetDAGCombine(ISD::NodeType NT) const {
- assert(unsigned(NT >> 3) < array_lengthof(TargetDAGCombineArray));
+ assert(unsigned(NT >> 3) < size(TargetDAGCombineArray));
return TargetDAGCombineArray[NT >> 3] & (1 << (NT&7));
}
/// specified value type. This indicates the selector can handle values of
/// that class natively.
void addRegisterClass(MVT VT, const TargetRegisterClass *RC) {
- assert((unsigned)VT.SimpleTy < array_lengthof(RegClassForVT));
+ assert((unsigned)VT.SimpleTy < size(RegClassForVT));
RegClassForVT[VT.SimpleTy] = RC;
}
/// type and indicate what to do about it. Note that VT may refer to either
/// the type of a result or that of an operand of Op.
void setOperationAction(unsigned Op, MVT VT, LegalizeAction Action) {
- assert(Op < array_lengthof(OpActions[0]) && "Table isn't big enough!");
+ assert(Op < size(OpActions[0]) && "Table isn't big enough!");
OpActions[(unsigned)VT.SimpleTy][Op] = Action;
}
/// target and indicate what to do about it.
void setCondCodeAction(ISD::CondCode CC, MVT VT,
LegalizeAction Action) {
- assert(VT.isValid() && (unsigned)CC < array_lengthof(CondCodeActions) &&
+ assert(VT.isValid() && (unsigned)CC < size(CondCodeActions) &&
"Table isn't big enough!");
assert((unsigned)Action < 0x10 && "too many bits for bitfield array");
/// The lower 3 bits of the SimpleTy index into Nth 4bit set from the 32-bit
/// they want to provide a custom DAG combiner for by implementing the
/// PerformDAGCombine virtual method.
void setTargetDAGCombine(ISD::NodeType NT) {
- assert(unsigned(NT >> 3) < array_lengthof(TargetDAGCombineArray));
+ assert(unsigned(NT >> 3) < size(TargetDAGCombineArray));
TargetDAGCombineArray[NT >> 3] |= 1 << (NT&7);
}
}
constexpr FeatureBitset &operator^=(const FeatureBitset &RHS) {
- for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) {
+ for (unsigned I = 0, E = llvm::size(Bits); I != E; ++I) {
Bits[I] ^= RHS.Bits[I];
}
return *this;
}
constexpr FeatureBitset &operator&=(const FeatureBitset &RHS) {
- for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) {
+ for (unsigned I = 0, E = llvm::size(Bits); I != E; ++I) {
Bits[I] &= RHS.Bits[I];
}
return *this;
}
constexpr FeatureBitset &operator|=(const FeatureBitset &RHS) {
- for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) {
+ for (unsigned I = 0, E = llvm::size(Bits); I != E; ++I) {
Bits[I] |= RHS.Bits[I];
}
return *this;
// The input vector this mask element indexes into.
unsigned Input = (unsigned)Idx / NewElts;
- if (Input >= array_lengthof(Inputs)) {
+ if (Input >= size(Inputs)) {
// The mask element does not index into any input vector.
Ops.push_back(-1);
continue;
// Find or create a shuffle vector operand to hold this input.
unsigned OpNo;
- for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
+ for (OpNo = 0; OpNo < size(InputUsed); ++OpNo) {
if (InputUsed[OpNo] == Input) {
// This input vector is already an operand.
break;
}
}
- if (OpNo >= array_lengthof(InputUsed)) {
+ if (OpNo >= size(InputUsed)) {
// More than two input vectors used! Give up on trying to create a
// shuffle vector. Insert all elements into a BUILD_VECTOR instead.
UseBuildVector = true;
// The input vector this mask element indexes into.
unsigned Input = (unsigned)Idx / NewElts;
- if (Input >= array_lengthof(Inputs)) {
+ if (Input >= size(Inputs)) {
// The mask element is "undef" or indexes off the end of the input.
SVOps.push_back(MIRBuilder.buildUndef(EltTy).getReg(0));
continue;
// The input vector this mask element indexes into.
unsigned Input = (unsigned)Idx / NewElts;
- if (Input >= array_lengthof(Inputs)) {
+ if (Input >= size(Inputs)) {
// The mask element does not index into any input vector.
Ops.push_back(-1);
continue;
// Find or create a shuffle vector operand to hold this input.
unsigned OpNo;
- for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
+ for (OpNo = 0; OpNo < size(InputUsed); ++OpNo) {
if (InputUsed[OpNo] == Input) {
// This input vector is already an operand.
break;
}
}
- if (OpNo >= array_lengthof(InputUsed)) {
+ if (OpNo >= size(InputUsed)) {
// More than two input vectors used! Give up on trying to create a
// shuffle vector. Insert all elements into a BUILD_VECTOR instead.
useBuildVector = true;
// The input vector this mask element indexes into.
unsigned Input = (unsigned)Idx / NewElts;
- if (Input >= array_lengthof(Inputs)) {
+ if (Input >= size(Inputs)) {
// The mask element is "undef" or indexes off the end of the input.
SVOps.push_back(DAG.getUNDEF(EltVT));
continue;
// If this is a simple type, use the ComputeRegisterProp mechanism.
if (VT.isSimple()) {
MVT SVT = VT.getSimpleVT();
- assert((unsigned)SVT.SimpleTy < array_lengthof(TransformToType));
+ assert((unsigned)SVT.SimpleTy < size(TransformToType));
MVT NVT = TransformToType[SVT.SimpleTy];
LegalizeTypeAction LA = ValueTypeActions.getTypeAction(SVT);
const MapVector<uint64_t, UnitIndexEntry> &IndexEntries,
uint32_t DWARFUnitIndex::Entry::SectionContribution::*Field) {
for (const auto &E : IndexEntries)
- for (size_t I = 0; I != array_lengthof(E.second.Contributions); ++I)
+ for (size_t I = 0; I != size(E.second.Contributions); ++I)
if (ContributionOffsets[I])
Out.emitIntValue(E.second.Contributions[I].*Field, 4);
}
} \
} while (false)
#define DEFINE_GETIMPL_STORE(CLASS, ARGS, OPS) \
- return storeImpl(new (array_lengthof(OPS)) \
+ return storeImpl(new (size(OPS)) \
CLASS(Context, Storage, UNWRAP_ARGS(ARGS), OPS), \
Storage, Context.pImpl->CLASS##s)
#define DEFINE_GETIMPL_STORE_NO_OPS(CLASS, ARGS) \
return storeImpl(new (0u) CLASS(Context, Storage, UNWRAP_ARGS(ARGS)), \
Storage, Context.pImpl->CLASS##s)
#define DEFINE_GETIMPL_STORE_NO_CONSTRUCTOR_ARGS(CLASS, OPS) \
- return storeImpl(new (array_lengthof(OPS)) CLASS(Context, Storage, OPS), \
+ return storeImpl(new (size(OPS)) CLASS(Context, Storage, OPS), \
Storage, Context.pImpl->CLASS##s)
#define DEFINE_GETIMPL_STORE_N(CLASS, ARGS, OPS, NUM_OPS) \
return storeImpl(new (NUM_OPS) \
Macros,
SysRoot,
SDK};
- return storeImpl(new (array_lengthof(Ops)) DICompileUnit(
+ return storeImpl(new (size(Ops)) DICompileUnit(
Context, Storage, SourceLanguage, IsOptimized,
RuntimeVersion, EmissionKind, DWOId, SplitDebugInlining,
DebugInfoForProfiling, NameTableKind, RangesBaseAddress,
{"FK_SecRel_8", 0, 64, 0},
};
- assert((size_t)Kind <= array_lengthof(Builtins) && "Unknown fixup kind");
+ assert((size_t)Kind <= size(Builtins) && "Unknown fixup kind");
return Builtins[Kind];
}
0, // length of DW_LNS_set_epilogue_begin
1 // DW_LNS_set_isa
};
- assert(array_lengthof(StandardOpcodeLengths) >=
+ assert(size(StandardOpcodeLengths) >=
(Params.DWARF2LineOpcodeBase - 1U));
return Emit(
MCOS, Params,
"ARM64_RELOC_ADDEND"
};
- if (RType >= array_lengthof(Table))
+ if (RType >= size(Table))
res = "Unknown";
else
res = Table[RType];
uint64_t value = de.getULEB128(cursor);
std::string description;
- if (value < array_lengthof(strings))
+ if (value < size(strings))
description = strings[value];
else if (value <= 12)
description = "8-byte alignment, " + utostr(1ULL << value) +
uint64_t value = de.getULEB128(cursor);
std::string description;
- if (value < array_lengthof(strings))
+ if (value < size(strings))
description = std::string(strings[value]);
else if (value <= 12)
description = std::string("8-byte stack alignment, ") +
Error ARMAttributeParser::handler(uint64_t tag, bool &handled) {
handled = false;
- for (unsigned AHI = 0, AHE = array_lengthof(displayRoutines); AHI != AHE;
+ for (unsigned AHI = 0, AHE = size(displayRoutines); AHI != AHE;
++AHI) {
if (uint64_t(displayRoutines[AHI].attribute) == tag) {
if (Error e =
static const int Signals[] =
{ SIGABRT, SIGBUS, SIGFPE, SIGILL, SIGSEGV, SIGTRAP };
-static const unsigned NumSignals = array_lengthof(Signals);
+static const unsigned NumSignals = size(Signals);
static struct sigaction PrevActions[NumSignals];
static void CrashRecoverySignalHandler(int Signal) {
std::max(static_cast<unsigned>(W), std::max(1u, Nibbles) + PrefixChars);
char NumberBuffer[kMaxWidth];
- ::memset(NumberBuffer, '0', llvm::array_lengthof(NumberBuffer));
+ ::memset(NumberBuffer, '0', llvm::size(NumberBuffer));
if (Prefix)
NumberBuffer[1] = 'x';
char *EndPtr = NumberBuffer + NumChars;
Error RISCVAttributeParser::handler(uint64_t tag, bool &handled) {
handled = false;
- for (unsigned AHI = 0, AHE = array_lengthof(displayRoutines); AHI != AHE;
+ for (unsigned AHI = 0, AHE = size(displayRoutines); AHI != AHE;
++AHI) {
if (uint64_t(displayRoutines[AHI].attribute) == tag) {
if (Error e = (this->*displayRoutines[AHI].routine)(tag))
// If they are not there already, permute the components into their canonical
// positions by seeing if they parse as a valid architecture, and if so moving
// the component to the architecture position etc.
- for (unsigned Pos = 0; Pos != array_lengthof(Found); ++Pos) {
+ for (unsigned Pos = 0; Pos != size(Found); ++Pos) {
if (Found[Pos])
continue; // Already in the canonical position.
for (unsigned Idx = 0; Idx != Components.size(); ++Idx) {
// Do not reparse any components that already matched.
- if (Idx < array_lengthof(Found) && Found[Idx])
+ if (Idx < size(Found) && Found[Idx])
continue;
// Does this component parse as valid for the target position?
// components to the right.
for (unsigned i = Pos; !CurrentComponent.empty(); ++i) {
// Skip over any fixed components.
- while (i < array_lengthof(Found) && Found[i])
+ while (i < size(Found) && Found[i])
++i;
// Place the component at the new position, getting the component
// that was at this position - it will be moved right.
if (CurrentComponent.empty())
break;
// Advance to the next component, skipping any fixed components.
- while (++i < array_lengthof(Found) && Found[i])
+ while (++i < size(Found) && Found[i])
;
}
// The last component was pushed off the end - append it.
Components.push_back(CurrentComponent);
// Advance Idx to the component's new position.
- while (++Idx < array_lengthof(Found) && Found[Idx])
+ while (++Idx < size(Found) && Found[Idx])
;
} while (Idx < Pos); // Add more until the final position is reached.
}
};
static const size_t NumSigs =
- array_lengthof(IntSigs) + array_lengthof(KillSigs) +
- array_lengthof(InfoSigs) + 1 /* SIGPIPE */;
+ size(IntSigs) + size(KillSigs) +
+ size(InfoSigs) + 1 /* SIGPIPE */;
static std::atomic<unsigned> NumRegisteredSignals = ATOMIC_VAR_INIT(0);
enum class SignalKind { IsKill, IsInfo };
auto registerHandler = [&](int Signal, SignalKind Kind) {
unsigned Index = NumRegisteredSignals.load();
- assert(Index < array_lengthof(RegisteredSignalInfo) &&
+ assert(Index < size(RegisteredSignalInfo) &&
"Out of space for signal handlers!");
struct sigaction NewHandler;
#if defined(HAVE_BACKTRACE)
// Use backtrace() to output a backtrace on Linux systems with glibc.
if (!depth)
- depth = backtrace(StackTrace, static_cast<int>(array_lengthof(StackTrace)));
+ depth = backtrace(StackTrace, static_cast<int>(size(StackTrace)));
#endif
#if defined(HAVE__UNWIND_BACKTRACE)
// Try _Unwind_Backtrace() if backtrace() failed.
if (!depth)
depth = unwindBacktrace(StackTrace,
- static_cast<int>(array_lengthof(StackTrace)));
+ static_cast<int>(size(StackTrace)));
#endif
if (!depth)
return;
return true;
// Then compare against the list of ancient reserved names.
- for (size_t i = 0; i < array_lengthof(sReservedNames); ++i) {
+ for (size_t i = 0; i < size(sReservedNames); ++i) {
if (path.equals_insensitive(sReservedNames[i]))
return true;
}
if (StackFrame.AddrFrame.Offset == 0)
break;
StackTrace[Depth++] = (void *)(uintptr_t)StackFrame.AddrPC.Offset;
- if (Depth >= array_lengthof(StackTrace))
+ if (Depth >= size(StackTrace))
break;
}
}
constexpr FeatureBitset &operator&=(const FeatureBitset &RHS) {
- for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) {
+ for (unsigned I = 0, E = size(Bits); I != E; ++I) {
// GCC <6.2 crashes if this is written in a single statement.
uint32_t NewBits = Bits[I] & RHS.Bits[I];
Bits[I] = NewBits;
}
constexpr FeatureBitset &operator|=(const FeatureBitset &RHS) {
- for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) {
+ for (unsigned I = 0, E = size(Bits); I != E; ++I) {
// GCC <6.2 crashes if this is written in a single statement.
uint32_t NewBits = Bits[I] | RHS.Bits[I];
Bits[I] = NewBits;
// gcc 5.3 miscompiles this if we try to write this using operator&=.
constexpr FeatureBitset operator&(const FeatureBitset &RHS) const {
FeatureBitset Result;
- for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I)
+ for (unsigned I = 0, E = size(Bits); I != E; ++I)
Result.Bits[I] = Bits[I] & RHS.Bits[I];
return Result;
}
// gcc 5.3 miscompiles this if we try to write this using operator&=.
constexpr FeatureBitset operator|(const FeatureBitset &RHS) const {
FeatureBitset Result;
- for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I)
+ for (unsigned I = 0, E = size(Bits); I != E; ++I)
Result.Bits[I] = Bits[I] | RHS.Bits[I];
return Result;
}
constexpr FeatureBitset operator~() const {
FeatureBitset Result;
- for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I)
+ for (unsigned I = 0, E = size(Bits); I != E; ++I)
Result.Bits[I] = ~Bits[I];
return Result;
}
constexpr bool operator!=(const FeatureBitset &RHS) const {
- for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I)
+ for (unsigned I = 0, E = size(Bits); I != E; ++I)
if (Bits[I] != RHS.Bits[I])
return true;
return false;
#include "llvm/Support/X86TargetParser.def"
std::numeric_limits<unsigned>::max() // Need to consume last comma.
};
- std::array<unsigned, array_lengthof(Priorities) - 1> HelperList;
+ std::array<unsigned, size(Priorities) - 1> HelperList;
std::iota(HelperList.begin(), HelperList.end(), 0);
assert(std::is_permutation(HelperList.begin(), HelperList.end(),
std::begin(Priorities),
C, C, C, C, C, C, C, C, C, C, C, C, C, C, C, C};
// Usually the indentation is small, handle it with a fastpath.
- if (NumChars < array_lengthof(Chars))
+ if (NumChars < size(Chars))
return OS.write(Chars, NumChars);
while (NumChars) {
unsigned NumToWrite = std::min(NumChars,
- (unsigned)array_lengthof(Chars)-1);
+ (unsigned)size(Chars)-1);
OS.write(Chars, NumToWrite);
NumChars -= NumToWrite;
}
static const MCPhysReg GPRArgRegs[] = { AArch64::X0, AArch64::X1, AArch64::X2,
AArch64::X3, AArch64::X4, AArch64::X5,
AArch64::X6, AArch64::X7 };
- static const unsigned NumGPRArgRegs = array_lengthof(GPRArgRegs);
+ static const unsigned NumGPRArgRegs = size(GPRArgRegs);
unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs);
unsigned GPRSaveSize = 8 * (NumGPRArgRegs - FirstVariadicGPR);
static const MCPhysReg FPRArgRegs[] = {
AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3,
AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7};
- static const unsigned NumFPRArgRegs = array_lengthof(FPRArgRegs);
+ static const unsigned NumFPRArgRegs = size(FPRArgRegs);
unsigned FirstVariadicFPR = CCInfo.getFirstUnallocated(FPRArgRegs);
unsigned FPRSaveSize = 16 * (NumFPRArgRegs - FirstVariadicFPR);
static const LdStNInstrDesc *getLdStNInstrDesc(unsigned Opcode) {
unsigned Idx;
- for (Idx = 0; Idx != array_lengthof(LdStNInstInfo); ++Idx)
+ for (Idx = 0; Idx != size(LdStNInstInfo); ++Idx)
if (LdStNInstInfo[Idx].Opcode == Opcode)
return &LdStNInstInfo[Idx];
};
const unsigned UnmangledFuncInfo::TableSize =
- array_lengthof(UnmangledFuncInfo::Table);
+ size(UnmangledFuncInfo::Table);
static AMDGPULibFunc::Param getRetType(AMDGPULibFunc::EFuncId id,
const AMDGPULibFunc::Param (&Leads)[2]) {
}
StringMap<int> ManglingRule::buildManglingRulesMap() {
- StringMap<int> Map(array_lengthof(manglingRules));
+ StringMap<int> Map(size(manglingRules));
int Id = 0;
for (auto Rule : manglingRules)
Map.insert({Rule.Name, Id++});
R600::sub12, R600::sub13, R600::sub14, R600::sub15
};
- assert(Channel < array_lengthof(SubRegFromChannelTable));
+ assert(Channel < size(SubRegFromChannelTable));
return SubRegFromChannelTable[Channel];
}
ARC::R4, ARC::R5, ARC::R6, ARC::R7};
auto *AFI = MF.getInfo<ARCFunctionInfo>();
unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs);
- if (FirstVAReg < array_lengthof(ArgRegs)) {
+ if (FirstVAReg < size(ArgRegs)) {
int Offset = 0;
// Save remaining registers, storing higher register numbers at a higher
// address
- // There are (array_lengthof(ArgRegs) - FirstVAReg) registers which
+ // There are (size(ArgRegs) - FirstVAReg) registers which
// need to be saved.
int VarFI =
- MFI.CreateFixedObject((array_lengthof(ArgRegs) - FirstVAReg) * 4,
+ MFI.CreateFixedObject((size(ArgRegs) - FirstVAReg) * 4,
CCInfo.getNextStackOffset(), true);
AFI->setVarArgsFrameIndex(VarFI);
SDValue FIN = DAG.getFrameIndex(VarFI, MVT::i32);
- for (unsigned i = FirstVAReg; i < array_lengthof(ArgRegs); i++) {
+ for (unsigned i = FirstVAReg; i < size(ArgRegs); i++) {
// Move argument from phys reg -> virt reg
unsigned VReg = RegInfo.createVirtualRegister(&ARC::GPR32RegClass);
RegInfo.addLiveIn(ArgRegs[i], VReg);
ARMBaseInstrInfo::ARMBaseInstrInfo(const ARMSubtarget& STI)
: ARMGenInstrInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP),
Subtarget(STI) {
- for (unsigned i = 0, e = array_lengthof(ARM_MLxTable); i != e; ++i) {
+ for (unsigned i = 0, e = size(ARM_MLxTable); i != e; ++i) {
if (!MLxEntryMap.insert(std::make_pair(ARM_MLxTable[i].MLxOpc, i)).second)
llvm_unreachable("Duplicated entries?");
MLxHazardOpcodes.insert(ARM_MLxTable[i].AddSubOpc);
};
unsigned llvm::convertAddSubFlagsOpcode(unsigned OldOpc) {
- for (unsigned i = 0, e = array_lengthof(AddSubFlagsOpcodeMap); i != e; ++i)
+ for (unsigned i = 0, e = size(AddSubFlagsOpcodeMap); i != e; ++i)
if (OldOpc == AddSubFlagsOpcodeMap[i].PseudoOpc)
return AddSubFlagsOpcodeMap[i].MachineOpc;
return 0;
const TargetFrameLowering::SpillSlot *
ARMFrameLowering::getCalleeSavedSpillSlots(unsigned &NumEntries) const {
static const SpillSlot FixedSpillOffsets[] = {{ARM::FPCXTNS, -4}};
- NumEntries = array_lengthof(FixedSpillOffsets);
+ NumEntries = size(FixedSpillOffsets);
return FixedSpillOffsets;
}
int lastInsIndex = -1;
if (isVarArg && MFI.hasVAStart()) {
unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs);
- if (RegIdx != array_lengthof(GPRArgRegs))
+ if (RegIdx != size(GPRArgRegs))
ArgRegBegin = std::min(ArgRegBegin, (unsigned)GPRArgRegs[RegIdx]);
}
Thumb2SizeReduce::Thumb2SizeReduce(std::function<bool(const Function &)> Ftor)
: MachineFunctionPass(ID), PredicateFtor(std::move(Ftor)) {
OptimizeSize = MinimizeSize = false;
- for (unsigned i = 0, e = array_lengthof(ReduceTable); i != e; ++i) {
+ for (unsigned i = 0, e = size(ReduceTable); i != e; ++i) {
unsigned FromOpc = ReduceTable[i].WideOpc;
if (!ReduceOpcodeMap.insert(std::make_pair(FromOpc, i)).second)
llvm_unreachable("Duplicated entries?");
AVR::R16R15, AVR::R15R14, AVR::R14R13, AVR::R13R12, AVR::R12R11,
AVR::R11R10, AVR::R10R9, AVR::R9R8};
-static_assert(array_lengthof(RegList8) == array_lengthof(RegList16),
+static_assert(size(RegList8) == size(RegList16),
"8-bit and 16-bit register arrays must be of equal length");
/// Analyze incoming and outgoing function arguments. We need custom C++ code
unsigned RegIdx = RegLastIdx + TotalBytes;
RegLastIdx = RegIdx;
// If there are not enough registers, use the stack
- if (RegIdx >= array_lengthof(RegList8)) {
+ if (RegIdx >= size(RegList8)) {
UseStack = true;
}
for (; i != j; ++i) {
/* 28 */ 0, 0, UTIMERLO, UTIMERHI
};
- if (RegNo >= array_lengthof(CtrlRegDecoderTable))
+ if (RegNo >= size(CtrlRegDecoderTable))
return MCDisassembler::Fail;
static_assert(NoRegister == 0, "Expecting NoRegister to be 0");
/* 28 */ 0, 0, UTIMER, 0
};
- if (RegNo >= array_lengthof(CtrlReg64DecoderTable))
+ if (RegNo >= size(CtrlReg64DecoderTable))
return MCDisassembler::Fail;
static_assert(NoRegister == 0, "Expecting NoRegister to be 0");
/* 28 */ GPMUCNT2, GPMUCNT3, G30, G31
};
- if (RegNo >= array_lengthof(GuestRegDecoderTable))
+ if (RegNo >= size(GuestRegDecoderTable))
return MCDisassembler::Fail;
if (GuestRegDecoderTable[RegNo] == Hexagon::NoRegister)
return MCDisassembler::Fail;
/* 28 */ G29_28, 0, G31_30, 0
};
- if (RegNo >= array_lengthof(GuestReg64DecoderTable))
+ if (RegNo >= size(GuestReg64DecoderTable))
return MCDisassembler::Fail;
if (GuestReg64DecoderTable[RegNo] == Hexagon::NoRegister)
return MCDisassembler::Fail;
{ Hexagon::R25, -36 }, { Hexagon::R24, -40 }, { Hexagon::D12, -40 },
{ Hexagon::R27, -44 }, { Hexagon::R26, -48 }, { Hexagon::D13, -48 }
};
- NumEntries = array_lengthof(Offsets);
+ NumEntries = size(Offsets);
return Offsets;
}
static const unsigned Regs01[] = { LC0, SA0, LC1, SA1 };
static const unsigned Regs1[] = { LC1, SA1 };
- auto CheckRegs = IsInnerHWLoop ? makeArrayRef(Regs01, array_lengthof(Regs01))
- : makeArrayRef(Regs1, array_lengthof(Regs1));
+ auto CheckRegs = IsInnerHWLoop ? makeArrayRef(Regs01, size(Regs01))
+ : makeArrayRef(Regs1, size(Regs1));
for (unsigned R : CheckRegs)
if (MI->modifiesRegister(R, TRI))
return true;
SDNode *S = StoreInstrForLoadIntrinsic(L, C);
SDValue F[] = { SDValue(N,0), SDValue(N,1), SDValue(C,0), SDValue(C,1) };
SDValue T[] = { SDValue(L,0), SDValue(S,0), SDValue(L,1), SDValue(S,0) };
- ReplaceUses(F, T, array_lengthof(T));
+ ReplaceUses(F, T, size(T));
// This transformation will leave the intrinsic dead. If it remains in
// the DAG, the selection code will see it again, but without the load,
// and it will generate a store that is normally required for it.
Hexagon::R0, Hexagon::R1, Hexagon::R2,
Hexagon::R3, Hexagon::R4, Hexagon::R5
};
- const unsigned NumArgRegs = array_lengthof(ArgRegs);
+ const unsigned NumArgRegs = size(ArgRegs);
unsigned RegNum = State.getFirstUnallocated(ArgRegs);
// RegNum is an index into ArgRegs: skip a register if RegNum is odd.
Hexagon::fixup_Hexagon_GPREL16_0, Hexagon::fixup_Hexagon_GPREL16_1,
Hexagon::fixup_Hexagon_GPREL16_2, Hexagon::fixup_Hexagon_GPREL16_3
};
- assert(Shift < array_lengthof(GPRelFixups));
+ assert(Shift < size(GPRelFixups));
auto UsesGP = [] (const MCInstrDesc &D) {
for (const MCPhysReg *U = D.getImplicitUses(); U && *U; ++U)
if (*U == Hexagon::GP)
{"fixup_8", 0, 8, 0},
{"fixup_sym_diff", 0, 32, 0},
};
- static_assert((array_lengthof(Infos)) == MSP430::NumTargetFixupKinds,
+ static_assert((size(Infos)) == MSP430::NumTargetFixupKinds,
"Not all fixup kinds added to Infos array");
if (Kind < FirstTargetFixupKind)
static const MCPhysReg CRegList[] = {
MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15
};
- static const unsigned CNbRegs = array_lengthof(CRegList);
+ static const unsigned CNbRegs = size(CRegList);
static const MCPhysReg BuiltinRegList[] = {
MSP430::R8, MSP430::R9, MSP430::R10, MSP430::R11,
MSP430::R12, MSP430::R13, MSP430::R14, MSP430::R15
};
- static const unsigned BuiltinNbRegs = array_lengthof(BuiltinRegList);
+ static const unsigned BuiltinNbRegs = size(BuiltinRegList);
ArrayRef<MCPhysReg> RegList;
unsigned NbRegs;
{ "fixup_Mips_JALR", 0, 32, 0 },
{ "fixup_MICROMIPS_JALR", 0, 32, 0 }
};
- static_assert(array_lengthof(LittleEndianInfos) == Mips::NumTargetFixupKinds,
+ static_assert(size(LittleEndianInfos) == Mips::NumTargetFixupKinds,
"Not all MIPS little endian fixup kinds added!");
const static MCFixupKindInfo BigEndianInfos[] = {
{ "fixup_Mips_JALR", 0, 32, 0 },
{ "fixup_MICROMIPS_JALR", 0, 32, 0 }
};
- static_assert(array_lengthof(BigEndianInfos) == Mips::NumTargetFixupKinds,
+ static_assert(size(BigEndianInfos) == Mips::NumTargetFixupKinds,
"Not all MIPS big endian fixup kinds added!");
if (Kind < FirstTargetFixupKind)
}
void Mips16TargetLowering::setMips16HardFloatLibCalls() {
- for (unsigned I = 0; I != array_lengthof(HardFloatLibCalls); ++I) {
+ for (unsigned I = 0; I != size(HardFloatLibCalls); ++I) {
assert((I == 0 || HardFloatLibCalls[I - 1] < HardFloatLibCalls[I]) &&
"Array not sorted!");
if (HardFloatLibCalls[I].Libcall != RTLIB::UNKNOWN_LIBCALL)
PPC::R3, PPC::R4, PPC::R5, PPC::R6,
PPC::R7, PPC::R8, PPC::R9, PPC::R10,
};
- const unsigned NumArgRegs = array_lengthof(ArgRegs);
+ const unsigned NumArgRegs = size(ArgRegs);
unsigned RegNum = State.getFirstUnallocated(ArgRegs);
PPC::R3, PPC::R4, PPC::R5, PPC::R6,
PPC::R7, PPC::R8, PPC::R9, PPC::R10,
};
- const unsigned NumArgRegs = array_lengthof(ArgRegs);
+ const unsigned NumArgRegs = size(ArgRegs);
unsigned RegNum = State.getFirstUnallocated(ArgRegs);
int RegsLeft = NumArgRegs - RegNum;
PPC::F8
};
- const unsigned NumArgRegs = array_lengthof(ArgRegs);
+ const unsigned NumArgRegs = size(ArgRegs);
unsigned RegNum = State.getFirstUnallocated(ArgRegs);
CALLEE_SAVED_FPRS, CALLEE_SAVED_GPRS64, CALLEE_SAVED_VRS};
if (Subtarget.is64BitELFABI()) {
- NumEntries = array_lengthof(ELFOffsets64);
+ NumEntries = size(ELFOffsets64);
return ELFOffsets64;
}
if (Subtarget.is32BitELFABI()) {
- NumEntries = array_lengthof(ELFOffsets32);
+ NumEntries = size(ELFOffsets32);
return ELFOffsets32;
}
assert(Subtarget.isAIXABI() && "Unexpected ABI.");
if (Subtarget.isPPC64()) {
- NumEntries = array_lengthof(AIXOffsets64);
+ NumEntries = size(AIXOffsets64);
return AIXOffsets64;
}
- NumEntries = array_lengthof(AIXOffsets32);
+ NumEntries = size(AIXOffsets32);
return AIXOffsets32;
}
PPC::R3, PPC::R4, PPC::R5, PPC::R6,
PPC::R7, PPC::R8, PPC::R9, PPC::R10,
};
- const unsigned NumGPArgRegs = array_lengthof(GPArgRegs);
+ const unsigned NumGPArgRegs = size(GPArgRegs);
static const MCPhysReg FPArgRegs[] = {
PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7,
PPC::F8
};
- unsigned NumFPArgRegs = array_lengthof(FPArgRegs);
+ unsigned NumFPArgRegs = size(FPArgRegs);
if (useSoftFloat() || hasSPE())
NumFPArgRegs = 0;
PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
};
- const unsigned Num_GPR_Regs = array_lengthof(GPR);
+ const unsigned Num_GPR_Regs = size(GPR);
const unsigned Num_FPR_Regs = useSoftFloat() ? 0 : 13;
- const unsigned Num_VR_Regs = array_lengthof(VR);
+ const unsigned Num_VR_Regs = size(VR);
// Do a first pass over the arguments to determine whether the ABI
// guarantees that our caller has allocated the parameter save area
PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
};
- const unsigned NumGPRs = array_lengthof(GPR);
+ const unsigned NumGPRs = size(GPR);
const unsigned NumFPRs = 13;
- const unsigned NumVRs = array_lengthof(VR);
+ const unsigned NumVRs = size(VR);
const unsigned ParamAreaSize = NumGPRs * PtrByteSize;
unsigned NumBytes = LinkageSize;
PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
};
- const unsigned NumGPRs = array_lengthof(GPR);
+ const unsigned NumGPRs = size(GPR);
const unsigned NumFPRs = useSoftFloat() ? 0 : 13;
- const unsigned NumVRs = array_lengthof(VR);
+ const unsigned NumVRs = size(VR);
// On ELFv2, we can avoid allocating the parameter area if all the arguments
// can be passed to the callee in registers.
static const MCPhysReg GPR_64[] = {PPC::X3, PPC::X4, PPC::X5, PPC::X6,
PPC::X7, PPC::X8, PPC::X9, PPC::X10};
- const unsigned NumGPArgRegs = array_lengthof(IsPPC64 ? GPR_64 : GPR_32);
+ const unsigned NumGPArgRegs = size(IsPPC64 ? GPR_64 : GPR_32);
// The fixed integer arguments of a variadic function are stored to the
// VarArgsFrameIndex on the stack so that they may be loaded by
-8, 8, -9, 9, -10, 10, -11, 11, -12, 12, -13, 13, 14, -14, 15, -15, -16
};
- for (unsigned idx = 0; idx < array_lengthof(SplatCsts); ++idx) {
+ for (unsigned idx = 0; idx < size(SplatCsts); ++idx) {
// Indirect through the SplatCsts array so that we favor 'vsplti -1' for
// cases which are ambiguous (e.g. formation of 0x8000_0000). 'vsplti -1'
int i = SplatCsts[idx];
// Check if an opcode is a FMA instruction. If it is, return the index in array
// FMAOpIdxInfo. Otherwise, return -1.
int16_t PPCInstrInfo::getFMAOpIdxInfo(unsigned Opcode) const {
- for (unsigned I = 0; I < array_lengthof(FMAOpIdxInfo); I++)
+ for (unsigned I = 0; I < size(FMAOpIdxInfo); I++)
if (FMAOpIdxInfo[I][InfoArrayIdxFMAInst] == Opcode)
return I;
return -1;
bool Found = false;
for (const MachineOperand &MO : MI.operands()) {
- for (unsigned c = 0; c < array_lengthof(RCs) && !Found; ++c) {
+ for (unsigned c = 0; c < size(RCs) && !Found; ++c) {
const TargetRegisterClass *RC = RCs[c];
if (MO.isReg()) {
if (MO.isDef() && RC->contains(MO.getReg())) {
{"fixup_riscv_set_6b", 2, 6, 0},
{"fixup_riscv_sub_6b", 2, 6, 0},
};
- static_assert((array_lengthof(Infos)) == RISCV::NumTargetFixupKinds,
+ static_assert((size(Infos)) == RISCV::NumTargetFixupKinds,
"Not all fixup kinds added to Infos array");
// Fixup kinds from .reloc directive are like R_RISCV_NONE. They
}
// FPR16, FPR32, and FPR64 alias each other.
- if (State.getFirstUnallocated(ArgFPR32s) == array_lengthof(ArgFPR32s)) {
+ if (State.getFirstUnallocated(ArgFPR32s) == size(ArgFPR32s)) {
UseGPRForF16_F32 = true;
UseGPRForF64 = true;
}
DL.getTypeAllocSize(OrigTy) == TwoXLenInBytes) {
unsigned RegIdx = State.getFirstUnallocated(ArgGPRs);
// Skip 'odd' register if necessary.
- if (RegIdx != array_lengthof(ArgGPRs) && RegIdx % 2 == 1)
+ if (RegIdx != size(ArgGPRs) && RegIdx % 2 == 1)
State.AllocateReg(ArgGPRs);
}
static DecodeStatus DecodePRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
uint64_t Address,
const void *Decoder) {
- if (RegNo >= array_lengthof(PRRegDecoderTable))
+ if (RegNo >= size(PRRegDecoderTable))
return MCDisassembler::Fail;
Inst.addOperand(MCOperand::createReg(PRRegDecoderTable[RegNo]));
return MCDisassembler::Success;
// Create a mapping from register number to save slot offset.
// These offsets are relative to the start of the register save area.
RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
- for (unsigned I = 0, E = array_lengthof(ELFSpillOffsetTable); I != E; ++I)
+ for (unsigned I = 0, E = size(ELFSpillOffsetTable); I != E; ++I)
RegSpillOffsets[ELFSpillOffsetTable[I].Reg] = ELFSpillOffsetTable[I].Offset;
}
// Create a mapping from register number to save slot offset.
// These offsets are relative to the start of the local are area.
RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
- for (unsigned I = 0, E = array_lengthof(XPLINKSpillOffsetTable); I != E; ++I)
+ for (unsigned I = 0, E = size(XPLINKSpillOffsetTable); I != E; ++I)
RegSpillOffsets[XPLINKSpillOffsetTable[I].Reg] =
XPLINKSpillOffsetTable[I].Offset;
}
{VE::SX25, 104}, {VE::SX26, 112}, {VE::SX27, 120}, {VE::SX28, 128},
{VE::SX29, 136}, {VE::SX30, 144}, {VE::SX31, 152}, {VE::SX32, 160},
{VE::SX33, 168}};
- NumEntries = array_lengthof(Offsets);
+ NumEntries = size(Offsets);
return Offsets;
}
}
}
- for (unsigned I = 0, E = array_lengthof(Match); I != E; ++I) {
+ for (unsigned I = 0, E = size(Match); I != E; ++I) {
Tmp.back() = Suffixes[I];
if (MemOp && HasVectorReg)
MemOp->Mem.Size = MemSize[I];
if (NumSuccessfulMatches > 1) {
char MatchChars[4];
unsigned NumMatches = 0;
- for (unsigned I = 0, E = array_lengthof(Match); I != E; ++I)
+ for (unsigned I = 0, E = size(Match); I != E; ++I)
if (Match[I] == Match_Success)
MatchChars[NumMatches++] = Suffixes[I];
continue;
bool IsAnyViable = false;
- for (unsigned j = 0; j != array_lengthof(ViableForN); ++j)
+ for (unsigned j = 0; j != size(ViableForN); ++j)
if (ViableForN[j]) {
uint64_t N = j + 1;
break;
}
- for (unsigned j = 0; j != array_lengthof(ViableForN); ++j)
+ for (unsigned j = 0; j != size(ViableForN); ++j)
if (ViableForN[j])
return j + 1;
};
XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs);
- if (FirstVAReg < array_lengthof(ArgRegs)) {
+ if (FirstVAReg < size(ArgRegs)) {
int offset = 0;
// Save remaining registers, storing higher register numbers at a higher
// address
- for (int i = array_lengthof(ArgRegs) - 1; i >= (int)FirstVAReg; --i) {
+ for (int i = size(ArgRegs) - 1; i >= (int)FirstVAReg; --i) {
// Create a stack slot
int FI = MFI.CreateFixedObject(4, offset, true);
if (i == (int)FirstVAReg) {
}
}
- assert((NextTmpIdx <= array_lengthof(TmpResult) + 1) &&
+ assert((NextTmpIdx <= size(TmpResult) + 1) &&
"out-of-bound access");
Value *Result;
ImmMapTy::const_iterator OtherImms[] = {
Imms.begin(), std::prev(Imms.end()),
Imms.lower_bound(Avg)};
- for (size_t i = 0, e = array_lengthof(OtherImms); i != e; ++i) {
+ for (size_t i = 0, e = size(OtherImms); i != e; ++i) {
ImmMapTy::const_iterator M = OtherImms[i];
if (M == J || M == JE) continue;
Renamer(unsigned int seed) { prng.srand(seed); }
const char *newName() {
- return metaNames[prng.rand() % array_lengthof(metaNames)];
+ return metaNames[prng.rand() % size(metaNames)];
}
PRNG prng;
// Build a map of component names to information.
StringMap<AvailableComponent *> ComponentMap;
- for (unsigned i = 0; i != array_lengthof(AvailableComponents); ++i) {
+ for (unsigned i = 0; i != size(AvailableComponents); ++i) {
AvailableComponent *AC = &AvailableComponents[i];
ComponentMap[AC->Name] = AC;
}
/// built, print LLVM_DYLIB_COMPONENTS instead of everything
/// in the manifest.
std::vector<std::string> Components;
- for (unsigned j = 0; j != array_lengthof(AvailableComponents); ++j) {
+ for (unsigned j = 0; j != size(AvailableComponents); ++j) {
// Only include non-installed components when in a development tree.
if (!AvailableComponents[j].IsInstalled && !IsInDevelopmentTree)
continue;
"Reserved",
};
outs() << "\nThe Data Directory\n";
- for (uint32_t I = 0; I != array_lengthof(DirName); ++I) {
+ for (uint32_t I = 0; I != size(DirName); ++I) {
uint32_t Addr = 0, Size = 0;
if (const data_directory *Data = Obj.getDataDirectory(I)) {
Addr = Data->RelativeVirtualAddress;
bool Terminated = false;
for (unsigned OI = Offset, OE = Opcodes.size(); !Terminated && OI < OE; ) {
for (unsigned DI = 0;; ++DI) {
- if ((isAArch64 && (DI >= array_lengthof(Ring64))) ||
- (!isAArch64 && (DI >= array_lengthof(Ring)))) {
+ if ((isAArch64 && (DI >= size(Ring64))) ||
+ (!isAArch64 && (DI >= size(Ring)))) {
SW.startLine() << format("0x%02x ; Bad opcode!\n",
Opcodes.data()[OI]);
++OI;
"Linux", "Hurd", "Solaris", "FreeBSD", "NetBSD", "Syllable", "NaCl",
};
StringRef OSName = "Unknown";
- if (Words[0] < array_lengthof(OSNames))
+ if (Words[0] < size(OSNames))
OSName = OSNames[Words[0]];
uint32_t Major = Words[1], Minor = Words[2], Patch = Words[3];
std::string str;
};
// Convert payload integer to decimal string representation.
- std::string NaNPayloadDecStrings[array_lengthof(NaNPayloads)];
- for (size_t I = 0; I < array_lengthof(NaNPayloads); ++I)
+ std::string NaNPayloadDecStrings[size(NaNPayloads)];
+ for (size_t I = 0; I < size(NaNPayloads); ++I)
NaNPayloadDecStrings[I] = utostr(NaNPayloads[I]);
// Convert payload integer to hexadecimal string representation.
- std::string NaNPayloadHexStrings[array_lengthof(NaNPayloads)];
- for (size_t I = 0; I < array_lengthof(NaNPayloads); ++I)
+ std::string NaNPayloadHexStrings[size(NaNPayloads)];
+ for (size_t I = 0; I < size(NaNPayloads); ++I)
NaNPayloadHexStrings[I] = "0x" + utohexstr(NaNPayloads[I]);
// Fix payloads to expected result.
for (char TypeChar : NaNTypes) {
bool Signaling = (TypeChar == 's' || TypeChar == 'S');
- for (size_t J = 0; J < array_lengthof(NaNPayloads); ++J) {
+ for (size_t J = 0; J < size(NaNPayloads); ++J) {
uint64_t Payload = (Signaling && !NaNPayloads[J]) ? SNaNDefaultPayload
: NaNPayloads[J];
std::string &PayloadDec = NaNPayloadDecStrings[J];
{ MSmallestNormalized, MSmallestNormalized, "-0x1p-125", APFloat::opOK, APFloat::fcNormal }
};
- for (size_t i = 0; i < array_lengthof(SpecialCaseTests); ++i) {
+ for (size_t i = 0; i < size(SpecialCaseTests); ++i) {
APFloat x(SpecialCaseTests[i].x);
APFloat y(SpecialCaseTests[i].y);
APFloat::opStatus status = x.add(y, APFloat::rmNearestTiesToEven);
{ MSmallestNormalized, MSmallestNormalized, "0x0p+0", APFloat::opOK, APFloat::fcZero }
};
- for (size_t i = 0; i < array_lengthof(SpecialCaseTests); ++i) {
+ for (size_t i = 0; i < size(SpecialCaseTests); ++i) {
APFloat x(SpecialCaseTests[i].x);
APFloat y(SpecialCaseTests[i].y);
APFloat::opStatus status = x.subtract(y, APFloat::rmNearestTiesToEven);
APFloat::rmNearestTiesToAway},
};
- for (size_t i = 0; i < array_lengthof(SpecialCaseTests); ++i) {
+ for (size_t i = 0; i < size(SpecialCaseTests); ++i) {
APFloat x(SpecialCaseTests[i].x);
APFloat y(SpecialCaseTests[i].y);
APFloat::opStatus status = x.multiply(y, SpecialCaseTests[i].roundingMode);
APFloat::rmNearestTiesToAway},
};
- for (size_t i = 0; i < array_lengthof(SpecialCaseTests); ++i) {
+ for (size_t i = 0; i < size(SpecialCaseTests); ++i) {
APFloat x(SpecialCaseTests[i].x);
APFloat y(SpecialCaseTests[i].y);
APFloat::opStatus status = x.divide(y, SpecialCaseTests[i].roundingMode);
{ MVal6, MVal6, "-0x0p+0", APFloat::opOK, APFloat::fcZero },
};
- for (size_t i = 0; i < array_lengthof(SpecialCaseTests); ++i) {
+ for (size_t i = 0; i < size(SpecialCaseTests); ++i) {
APFloat x(SpecialCaseTests[i].x);
APFloat y(SpecialCaseTests[i].y);
APFloat::opStatus status = x.remainder(y);
uint32_t U32;
uint64_t U64;
- for (size_t i = 0; i < array_lengthof(Unsigned); ++i) {
+ for (size_t i = 0; i < size(Unsigned); ++i) {
bool U8Success = StringRef(Unsigned[i].Str).getAsInteger(0, U8);
if (static_cast<uint8_t>(Unsigned[i].Expected) == Unsigned[i].Expected) {
ASSERT_FALSE(U8Success);
int32_t S32;
int64_t S64;
- for (size_t i = 0; i < array_lengthof(Signed); ++i) {
+ for (size_t i = 0; i < size(Signed); ++i) {
bool S8Success = StringRef(Signed[i].Str).getAsInteger(0, S8);
if (static_cast<int8_t>(Signed[i].Expected) == Signed[i].Expected) {
ASSERT_FALSE(S8Success);
TEST(StringRefTest, getAsUnsignedIntegerBadStrings) {
unsigned long long U64;
- for (size_t i = 0; i < array_lengthof(BadStrings); ++i) {
+ for (size_t i = 0; i < size(BadStrings); ++i) {
bool IsBadNumber = StringRef(BadStrings[i]).getAsInteger(0, U64);
ASSERT_TRUE(IsBadNumber);
}
uint32_t U32;
uint64_t U64;
- for (size_t i = 0; i < array_lengthof(ConsumeUnsigned); ++i) {
+ for (size_t i = 0; i < size(ConsumeUnsigned); ++i) {
StringRef Str = ConsumeUnsigned[i].Str;
bool U8Success = Str.consumeInteger(0, U8);
if (static_cast<uint8_t>(ConsumeUnsigned[i].Expected) ==
int32_t S32;
int64_t S64;
- for (size_t i = 0; i < array_lengthof(ConsumeSigned); ++i) {
+ for (size_t i = 0; i < size(ConsumeSigned); ++i) {
StringRef Str = ConsumeSigned[i].Str;
bool S8Success = Str.consumeInteger(0, S8);
if (static_cast<int8_t>(ConsumeSigned[i].Expected) ==
TEST(StringRefTest, joinStrings) {
std::vector<StringRef> v1;
std::vector<std::string> v2;
- for (size_t i = 0; i < array_lengthof(join_input); ++i) {
+ for (size_t i = 0; i < size(join_input); ++i) {
v1.push_back(join_input[i]);
v2.push_back(join_input[i]);
}
std::vector<PtrT> TestPtrs;
TinyPtrVectorTest() {
- for (size_t i = 0, e = array_lengthof(TestValues); i != e; ++i)
+ for (size_t i = 0, e = size(TestValues); i != e; ++i)
TestPtrs.push_back(PtrT(&TestValues[i]));
std::shuffle(TestPtrs.begin(), TestPtrs.end(), std::mt19937{});
TEST_P(CoverageMappingTest, correct_deserialize_for_more_than_two_files) {
const char *FileNames[] = {"bar", "baz", "foo"};
- static const unsigned N = array_lengthof(FileNames);
+ static const unsigned N = size(FileNames);
startFunction("func", 0x1234);
for (unsigned I = 0; I < N; ++I)
ProfileWriter.addRecord({"func", 0x1234, {0}}, Err);
const char *FileNames[] = {"bar", "baz", "foo"};
- static const unsigned N = array_lengthof(FileNames);
+ static const unsigned N = size(FileNames);
startFunction("func", 0x1234);
for (unsigned I = 0; I < N; ++I)
};
constexpr endianness Endians[] = {big, little, native};
-constexpr uint32_t NumEndians = llvm::array_lengthof(Endians);
+constexpr uint32_t NumEndians = llvm::size(Endians);
constexpr uint32_t NumStreams = 2 * NumEndians;
class BinaryStreamTest : public testing::Test {
{ "-tool", "-alias", "x" }
};
- for (size_t i = 0, e = array_lengthof(Inputs); i < e; ++i) {
+ for (size_t i = 0, e = size(Inputs); i < e; ++i) {
StackOption<std::string> Actual("actual");
StackOption<bool> Extra("extra");
StackOption<std::string> Input(cl::Positional);
TEST(CommandLineTest, AliasRequired) {
const char *opts1[] = { "-tool", "-option=x" };
const char *opts2[] = { "-tool", "-o", "x" };
- testAliasRequired(array_lengthof(opts1), opts1);
- testAliasRequired(array_lengthof(opts2), opts2);
+ testAliasRequired(size(opts1), opts1);
+ testAliasRequired(size(opts2), opts2);
}
TEST(CommandLineTest, HideUnrelatedOptions) {
/*CurrentDir=*/StringRef(TestRoot), FS));
const char *Expected[] = {"clang", "-Xclang", "-Wno-whatever", nullptr,
"input.cpp"};
- ASSERT_EQ(array_lengthof(Expected), Argv.size());
- for (size_t I = 0, E = array_lengthof(Expected); I < E; ++I) {
+ ASSERT_EQ(size(Expected), Argv.size());
+ for (size_t I = 0, E = size(Expected); I < E; ++I) {
if (Expected[I] == nullptr) {
ASSERT_EQ(Argv[I], nullptr);
} else {
std::string S;
llvm::raw_string_ostream Stream(S);
Stream << formatv(Intro, std::tuple_size<Tuple>::value,
- llvm::array_lengthof(Ts))
+ llvm::size(Ts))
<< "\n";
Stream << formatv(Header, "Char", "HexInt", "Str", "Ref", "std::str",
"double", "float", "pointer", "comma", "exp", "bigint",
{"mve", "nomve", "+mve", "-mve"},
{"mve.fp", "nomve.fp", "+mve.fp", "-mve.fp"}};
- for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
+ for (unsigned i = 0; i < size(ArchExt); i++) {
EXPECT_EQ(StringRef(ArchExt[i][2]), ARM::getArchExtFeature(ArchExt[i][0]));
EXPECT_EQ(StringRef(ArchExt[i][3]), ARM::getArchExtFeature(ArchExt[i][1]));
}
TEST(TargetParserTest, ARMparseHWDiv) {
const char *hwdiv[] = {"thumb", "arm", "arm,thumb", "thumb,arm"};
- for (unsigned i = 0; i < array_lengthof(hwdiv); i++)
+ for (unsigned i = 0; i < size(hwdiv); i++)
EXPECT_NE(ARM::AEK_INVALID, ARM::parseHWDiv((StringRef)hwdiv[i]));
}
"v8.7a", "v8.8-a", "v8.8a", "v8-r", "v8m.base", "v8m.main",
"v8.1m.main"};
- for (unsigned i = 0; i < array_lengthof(Arch); i++) {
+ for (unsigned i = 0; i < size(Arch); i++) {
std::string arm_1 = "armeb" + (std::string)(Arch[i]);
std::string arm_2 = "arm" + (std::string)(Arch[i]) + "eb";
std::string arm_3 = "arm" + (std::string)(Arch[i]);
}
TEST(TargetParserTest, ARMparseArchProfile) {
- for (unsigned i = 0; i < array_lengthof(ARMArch); i++) {
+ for (unsigned i = 0; i < size(ARMArch); i++) {
switch (ARM::parseArch(ARMArch[i])) {
case ARM::ArchKind::ARMV6M:
case ARM::ArchKind::ARMV7M:
}
TEST(TargetParserTest, ARMparseArchVersion) {
- for (unsigned i = 0; i < array_lengthof(ARMArch); i++)
+ for (unsigned i = 0; i < size(ARMArch); i++)
if (((std::string)ARMArch[i]).substr(0, 4) == "armv")
EXPECT_EQ((ARMArch[i][4] - 48u), ARM::parseArchVersion(ARMArch[i]));
else
{"pmuv3", "nopmuv3", "+perfmon", "-perfmon"},
};
- for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
+ for (unsigned i = 0; i < size(ArchExt); i++) {
EXPECT_EQ(StringRef(ArchExt[i][2]),
AArch64::getArchExtFeature(ArchExt[i][0]));
EXPECT_EQ(StringRef(ArchExt[i][3]),
Success = ::GetMappedFileNameA(::GetCurrentProcess(),
MappedFile,
Filename,
- array_lengthof(Filename) - 1);
+ size(Filename) - 1);
if (!Success)
return windows_error(::GetLastError());
DWORD length = ::SearchPathA(NULL,
Program.c_str(),
Extension,
- array_lengthof(PathName),
+ size(PathName),
PathName,
NULL);
if (length == 0)
ec = windows_error(::GetLastError());
- else if (length > array_lengthof(PathName)) {
+ else if (length > size(PathName)) {
// This may have been the file, return with error.
ec = windows_error(ERROR_BUFFER_OVERFLOW);
break;
O.indent(2) << " makeArrayRef(OpToPatterns),\n";
O.indent(2) << " makeArrayRef(Patterns),\n";
O.indent(2) << " makeArrayRef(Conds),\n";
- O.indent(2) << " StringRef(AsmStrings, array_lengthof(AsmStrings)),\n";
+ O.indent(2) << " StringRef(AsmStrings, size(AsmStrings)),\n";
if (MCOpPredicates.empty())
O.indent(2) << " nullptr,\n";
else
nullptr};
unsigned CodeGenTarget::getNumFixedInstructions() {
- return array_lengthof(FixedInstrs) - 1;
+ return size(FixedInstrs) - 1;
}
/// Return all of the instructions defined by the target, ordered by
OS << "extern const unsigned " << Namespace
<< (j == 0 ? "DwarfFlavour" : "EHFlavour") << I << "Dwarf2LSize";
if (!isCtor)
- OS << " = array_lengthof(" << Namespace
+ OS << " = size(" << Namespace
<< (j == 0 ? "DwarfFlavour" : "EHFlavour") << I << "Dwarf2L);\n\n";
else
OS << ";\n\n";
OS << "extern const unsigned " << Namespace
<< (j == 0 ? "DwarfFlavour" : "EHFlavour") << i << "L2DwarfSize";
if (!isCtor)
- OS << " = array_lengthof(" << Namespace
+ OS << " = size(" << Namespace
<< (j == 0 ? "DwarfFlavour" : "EHFlavour") << i << "L2Dwarf);\n\n";
else
OS << ";\n\n";
}
DisassemblerTables::DisassemblerTables() {
- for (unsigned i = 0; i < array_lengthof(Tables); i++)
+ for (unsigned i = 0; i < size(Tables); i++)
Tables[i] = std::make_unique<ContextDecision>();
HasConflicts = false;
"}; " #
// The following manual ArrayRef constructor call is to satisfy GCC 5.
"ArrayRef<::mlir::spirv::Extension> " #
- "ref(exts, ::llvm::array_lengthof(exts));");
+ "ref(exts, ::llvm::size(exts));");
let instance = "ref";
}
"}; " #
// The following manual ArrayRef constructor call is to satisfy GCC 5.
"ArrayRef<::mlir::spirv::Capability> " #
- "ref(caps, ::llvm::array_lengthof(caps));");
+ "ref(caps, ::llvm::size(caps));");
let instance = "ref";
}
case Version::V_1_3: {
// The following manual ArrayRef constructor call is to satisfy GCC 5.
static const Extension exts[] = {V_1_3_IMPLIED_EXTS};
- return ArrayRef<spirv::Extension>(exts, llvm::array_lengthof(exts));
+ return ArrayRef<spirv::Extension>(exts, llvm::size(exts));
}
case Version::V_1_4: {
static const Extension exts[] = {V_1_3_IMPLIED_EXTS, V_1_4_IMPLIED_EXTS};
- return ArrayRef<spirv::Extension>(exts, llvm::array_lengthof(exts));
+ return ArrayRef<spirv::Extension>(exts, llvm::size(exts));
}
case Version::V_1_5: {
static const Extension exts[] = {V_1_3_IMPLIED_EXTS, V_1_4_IMPLIED_EXTS,
V_1_5_IMPLIED_EXTS};
- return ArrayRef<spirv::Extension>(exts, llvm::array_lengthof(exts));
+ return ArrayRef<spirv::Extension>(exts, llvm::size(exts));
}
}
auto vecSize = getNumElements();
if (vecSize == 8 || vecSize == 16) {
static const Capability caps[] = {Capability::Vector16};
- ArrayRef<Capability> ref(caps, llvm::array_lengthof(caps));
+ ArrayRef<Capability> ref(caps, llvm::size(caps));
capabilities.push_back(ref);
}
return type.getElementType().cast<ScalarType>().getCapabilities(
Optional<StorageClass> storage) {
getElementType().cast<SPIRVType>().getExtensions(extensions, storage);
static const Extension exts[] = {Extension::SPV_NV_cooperative_matrix};
- ArrayRef<Extension> ref(exts, llvm::array_lengthof(exts));
+ ArrayRef<Extension> ref(exts, llvm::size(exts));
extensions.push_back(ref);
}
Optional<StorageClass> storage) {
getElementType().cast<SPIRVType>().getCapabilities(capabilities, storage);
static const Capability caps[] = {Capability::CooperativeMatrixNV};
- ArrayRef<Capability> ref(caps, llvm::array_lengthof(caps));
+ ArrayRef<Capability> ref(caps, llvm::size(caps));
capabilities.push_back(ref);
}
Optional<StorageClass> storage) {
{
static const Capability caps[] = {Capability::Shader};
- ArrayRef<Capability> ref(caps, llvm::array_lengthof(caps));
+ ArrayRef<Capability> ref(caps, llvm::size(caps));
capabilities.push_back(ref);
}
getElementType().cast<SPIRVType>().getCapabilities(capabilities, storage);
case StorageClass::Uniform:
if (getIntOrFloatBitWidth() == 8) {
static const Extension exts[] = {Extension::SPV_KHR_8bit_storage};
- ArrayRef<Extension> ref(exts, llvm::array_lengthof(exts));
+ ArrayRef<Extension> ref(exts, llvm::size(exts));
extensions.push_back(ref);
}
LLVM_FALLTHROUGH;
case StorageClass::Output:
if (getIntOrFloatBitWidth() == 16) {
static const Extension exts[] = {Extension::SPV_KHR_16bit_storage};
- ArrayRef<Extension> ref(exts, llvm::array_lengthof(exts));
+ ArrayRef<Extension> ref(exts, llvm::size(exts));
extensions.push_back(ref);
}
break;
case StorageClass::storage: { \
if (bitwidth == 8) { \
static const Capability caps[] = {Capability::cap8}; \
- ArrayRef<Capability> ref(caps, llvm::array_lengthof(caps)); \
+ ArrayRef<Capability> ref(caps, llvm::size(caps)); \
capabilities.push_back(ref); \
} else if (bitwidth == 16) { \
static const Capability caps[] = {Capability::cap16}; \
- ArrayRef<Capability> ref(caps, llvm::array_lengthof(caps)); \
+ ArrayRef<Capability> ref(caps, llvm::size(caps)); \
capabilities.push_back(ref); \
} \
/* No requirements for other bitwidths */ \
case StorageClass::Output: {
if (bitwidth == 16) {
static const Capability caps[] = {Capability::StorageInputOutput16};
- ArrayRef<Capability> ref(caps, llvm::array_lengthof(caps));
+ ArrayRef<Capability> ref(caps, llvm::size(caps));
capabilities.push_back(ref);
}
return;
#define WIDTH_CASE(type, width) \
case width: { \
static const Capability caps[] = {Capability::type##width}; \
- ArrayRef<Capability> ref(caps, llvm::array_lengthof(caps)); \
+ ArrayRef<Capability> ref(caps, llvm::size(caps)); \
capabilities.push_back(ref); \
} break
Optional<StorageClass> storage) {
{
static const Capability caps[] = {Capability::Matrix};
- ArrayRef<Capability> ref(caps, llvm::array_lengthof(caps));
+ ArrayRef<Capability> ref(caps, llvm::size(caps));
capabilities.push_back(ref);
}
// Add any capabilities associated with the underlying vectors (i.e., columns)