ARM: keystone2: K2G: Add support for different arm/device speeds
authorLokesh Vutla <lokeshvutla@ti.com>
Fri, 4 Mar 2016 16:36:41 +0000 (10:36 -0600)
committerTom Rini <trini@konsulko.com>
Mon, 14 Mar 2016 23:18:44 +0000 (19:18 -0400)
The maximum device and arm speeds can be determined by reading
EFUSE_BOOTROM register. As there is already a framework for reading this
register, adding support for all possible speeds on k2g devices.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
arch/arm/mach-keystone/clock.c
arch/arm/mach-keystone/include/mach/clock-k2g.h
arch/arm/mach-keystone/include/mach/clock.h
board/ti/ks2_evm/board_k2g.c

index 1ae3baf..b25db1e 100644 (file)
@@ -238,8 +238,11 @@ static int get_max_speed(u32 val, u32 speed_supported, int *spds)
                        return spds[speed];
        }
 
-       /* If no bit is set, use SPD800 */
-       return SPD800;
+       /* If no bit is set, return minimum speed */
+       if (cpu_is_k2g())
+               return SPD200;
+       else
+               return SPD800;
 }
 
 static inline u32 read_efuse_bootrom(void)
index 214c1d3..74de620 100644 (file)
@@ -12,8 +12,8 @@
 
 #define PLLSET_CMD_LIST                "<pa|arm|ddr3>"
 
-#define DEV_SUPPORTED_SPEEDS   0xfff
-#define ARM_SUPPORTED_SPEEDS   0xfff
+#define DEV_SUPPORTED_SPEEDS   0x1ff
+#define ARM_SUPPORTED_SPEEDS   0xff
 
 #define KS2_CLK1_6 sys_clk0_6_clk
 
index dfebcb0..72724aa 100644 (file)
 #define CLOCK_INDEXES_LIST     CLK_LIST(GENERATE_INDX_STR)
 
 enum {
+       SPD200,
+       SPD400,
+       SPD600,
        SPD800,
        SPD850,
+       SPD900,
        SPD1000,
        SPD1200,
        SPD1250,
index cdeb056..b62c412 100644 (file)
@@ -23,22 +23,64 @@ unsigned int external_clk[ext_clk_count] = {
        [uart_clk]      =       SYS_CLK,
 };
 
-static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
-static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
+static int arm_speeds[DEVSPEED_NUMSPDS] = {
+       SPD400,
+       SPD600,
+       SPD800,
+       SPD900,
+       SPD1000,
+       SPD900,
+       SPD800,
+       SPD600,
+       SPD400,
+       SPD200,
+};
+
+static int dev_speeds[DEVSPEED_NUMSPDS] = {
+       SPD600,
+       SPD800,
+       SPD900,
+       SPD1000,
+       SPD900,
+       SPD800,
+       SPD600,
+       SPD400,
+};
+
+static struct pll_init_data main_pll_config[NUM_SPDS] = {
+       [SPD400]        = {MAIN_PLL, 100, 3, 2},
+       [SPD600]        = {MAIN_PLL, 300, 6, 2},
+       [SPD800]        = {MAIN_PLL, 200, 3, 2},
+       [SPD900] =      {TETRIS_PLL, 75, 1, 2},
+       [SPD1000] =     {TETRIS_PLL, 250, 3, 2},
+};
+
+static struct pll_init_data tetris_pll_config[NUM_SPDS] = {
+       [SPD200] =      {TETRIS_PLL, 250, 3, 10},
+       [SPD400] =      {TETRIS_PLL, 100, 1, 6},
+       [SPD600] =      {TETRIS_PLL, 100, 1, 4},
+       [SPD800] =      {TETRIS_PLL, 400, 3, 4},
+       [SPD900] =      {TETRIS_PLL, 75, 1, 2},
+       [SPD1000] =     {TETRIS_PLL, 250, 3, 2},
+};
+
 static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
 static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
 static struct pll_init_data ddr3_pll_config = {DDR3A_PLL, 250, 3, 10};
 
 struct pll_init_data *get_pll_init_data(int pll)
 {
+       int speed;
        struct pll_init_data *data = NULL;
 
        switch (pll) {
        case MAIN_PLL:
-               data = &main_pll_config;
+               speed = get_max_dev_speed(dev_speeds);
+               data = &main_pll_config[speed];
                break;
        case TETRIS_PLL:
-               data = &tetris_pll_config;
+               speed = get_max_arm_speed(arm_speeds);
+               data = &tetris_pll_config[speed];
                break;
        case NSS_PLL:
                data = &nss_pll_config;