Summary: This updates the relevant Clang parts for the LLVM change D35882.
Reviewers: rengolin, chandlerc, javed.absar, rovka
Reviewed By: rovka
Subscribers: aemerson, cfe-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D35884
llvm-svn: 309289
bool AArch64TargetInfo::isValidCPUName(StringRef Name) const {
return Name == "generic" ||
- llvm::AArch64::parseCPUArch(Name) !=
- static_cast<unsigned>(llvm::AArch64::ArchKind::AK_INVALID);
+ llvm::AArch64::parseCPUArch(Name) != llvm::AArch64::ArchKind::INVALID;
}
bool AArch64TargetInfo::setCPU(const std::string &Name) {
switch (ArchKind) {
default:
break;
- case llvm::AArch64::ArchKind::AK_ARMV8_1A:
+ case llvm::AArch64::ArchKind::ARMV8_1A:
getTargetDefinesARMV81A(Opts, Builder);
break;
- case llvm::AArch64::ArchKind::AK_ARMV8_2A:
+ case llvm::AArch64::ArchKind::ARMV8_2A:
getTargetDefinesARMV82A(Opts, Builder);
break;
}
Crypto = 0;
Unaligned = 1;
HasFullFP16 = 0;
- ArchKind = llvm::AArch64::ArchKind::AK_ARMV8A;
+ ArchKind = llvm::AArch64::ArchKind::ARMV8A;
for (const auto &Feature : Features) {
if (Feature == "+neon")
if (Feature == "+strict-align")
Unaligned = 0;
if (Feature == "+v8.1a")
- ArchKind = llvm::AArch64::ArchKind::AK_ARMV8_1A;
+ ArchKind = llvm::AArch64::ArchKind::ARMV8_1A;
if (Feature == "+v8.2a")
- ArchKind = llvm::AArch64::ArchKind::AK_ARMV8_2A;
+ ArchKind = llvm::AArch64::ArchKind::ARMV8_2A;
if (Feature == "+fullfp16")
HasFullFP16 = 1;
}
ArchISA = llvm::ARM::parseArchISA(ArchName);
CPU = llvm::ARM::getDefaultCPU(ArchName);
- unsigned AK = llvm::ARM::parseArch(ArchName);
- if (AK != llvm::ARM::AK_INVALID)
+ llvm::ARM::ArchKind AK = llvm::ARM::parseArch(ArchName);
+ if (AK != llvm::ARM::ArchKind::INVALID)
ArchKind = AK;
setArchInfo(ArchKind);
}
-void ARMTargetInfo::setArchInfo(unsigned Kind) {
+void ARMTargetInfo::setArchInfo(llvm::ARM::ArchKind Kind) {
StringRef SubArch;
// cache TargetParser info
// when triple does not specify a sub arch,
// then we are not using inline atomics
bool ShouldUseInlineAtomic =
- (ArchISA == llvm::ARM::IK_ARM && ArchVersion >= 6) ||
- (ArchISA == llvm::ARM::IK_THUMB && ArchVersion >= 7);
+ (ArchISA == llvm::ARM::ISAKind::ARM && ArchVersion >= 6) ||
+ (ArchISA == llvm::ARM::ISAKind::THUMB && ArchVersion >= 7);
// Cortex M does not support 8 byte atomics, while general Thumb2 does.
- if (ArchProfile == llvm::ARM::PK_M) {
+ if (ArchProfile == llvm::ARM::ProfileKind::M) {
MaxAtomicPromoteWidth = 32;
if (ShouldUseInlineAtomic)
MaxAtomicInlineWidth = 32;
}
}
-bool ARMTargetInfo::isThumb() const { return (ArchISA == llvm::ARM::IK_THUMB); }
+bool ARMTargetInfo::isThumb() const {
+ return ArchISA == llvm::ARM::ISAKind::THUMB;
+}
bool ARMTargetInfo::supportsThumb() const {
return CPUAttr.count('T') || ArchVersion >= 6;
switch (ArchKind) {
default:
return llvm::ARM::getCPUAttr(ArchKind);
- case llvm::ARM::AK_ARMV6M:
+ case llvm::ARM::ArchKind::ARMV6M:
return "6M";
- case llvm::ARM::AK_ARMV7S:
+ case llvm::ARM::ArchKind::ARMV7S:
return "7S";
- case llvm::ARM::AK_ARMV7A:
+ case llvm::ARM::ArchKind::ARMV7A:
return "7A";
- case llvm::ARM::AK_ARMV7R:
+ case llvm::ARM::ArchKind::ARMV7R:
return "7R";
- case llvm::ARM::AK_ARMV7M:
+ case llvm::ARM::ArchKind::ARMV7M:
return "7M";
- case llvm::ARM::AK_ARMV7EM:
+ case llvm::ARM::ArchKind::ARMV7EM:
return "7EM";
- case llvm::ARM::AK_ARMV7VE:
+ case llvm::ARM::ArchKind::ARMV7VE:
return "7VE";
- case llvm::ARM::AK_ARMV8A:
+ case llvm::ARM::ArchKind::ARMV8A:
return "8A";
- case llvm::ARM::AK_ARMV8_1A:
+ case llvm::ARM::ArchKind::ARMV8_1A:
return "8_1A";
- case llvm::ARM::AK_ARMV8_2A:
+ case llvm::ARM::ArchKind::ARMV8_2A:
return "8_2A";
- case llvm::ARM::AK_ARMV8MBaseline:
+ case llvm::ARM::ArchKind::ARMV8MBaseline:
return "8M_BASE";
- case llvm::ARM::AK_ARMV8MMainline:
+ case llvm::ARM::ArchKind::ARMV8MMainline:
return "8M_MAIN";
- case llvm::ARM::AK_ARMV8R:
+ case llvm::ARM::ArchKind::ARMV8R:
return "8R";
}
}
StringRef ARMTargetInfo::getCPUProfile() const {
switch (ArchProfile) {
- case llvm::ARM::PK_A:
+ case llvm::ARM::ProfileKind::A:
return "A";
- case llvm::ARM::PK_R:
+ case llvm::ARM::ProfileKind::R:
return "R";
- case llvm::ARM::PK_M:
+ case llvm::ARM::ProfileKind::M:
return "M";
default:
return "";
// the frontend matches that.
if (Triple.getEnvironment() == llvm::Triple::EABI ||
Triple.getOS() == llvm::Triple::UnknownOS ||
- ArchProfile == llvm::ARM::PK_M) {
+ ArchProfile == llvm::ARM::ProfileKind::M) {
setABI("aapcs");
} else if (Triple.isWatchABI()) {
setABI("aapcs16");
const std::vector<std::string> &FeaturesVec) const {
std::vector<StringRef> TargetFeatures;
- unsigned Arch = llvm::ARM::parseArch(getTriple().getArchName());
+ llvm::ARM::ArchKind Arch = llvm::ARM::parseArch(getTriple().getArchName());
// get default FPU features
unsigned FPUKind = llvm::ARM::getDefaultFPU(CPU, Arch);
switch (ArchVersion) {
case 6:
- if (ArchProfile == llvm::ARM::PK_M)
+ if (ArchProfile == llvm::ARM::ProfileKind::M)
LDREX = 0;
- else if (ArchKind == llvm::ARM::AK_ARMV6K)
+ else if (ArchKind == llvm::ARM::ArchKind::ARMV6K)
LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B;
else
LDREX = LDREX_W;
break;
case 7:
- if (ArchProfile == llvm::ARM::PK_M)
+ if (ArchProfile == llvm::ARM::ProfileKind::M)
LDREX = LDREX_W | LDREX_H | LDREX_B;
else
LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B;
bool ARMTargetInfo::isValidCPUName(StringRef Name) const {
return Name == "generic" ||
- llvm::ARM::parseCPUArch(Name) != llvm::ARM::AK_INVALID;
+ llvm::ARM::parseCPUArch(Name) != llvm::ARM::ArchKind::INVALID;
}
bool ARMTargetInfo::setCPU(const std::string &Name) {
if (Name != "generic")
setArchInfo(llvm::ARM::parseCPUArch(Name));
- if (ArchKind == llvm::ARM::AK_INVALID)
+ if (ArchKind == llvm::ARM::ArchKind::INVALID)
return false;
setAtomic();
CPU = Name;
// __ARM_ARCH_ISA_ARM is defined to 1 if the core supports the ARM ISA. It
// is not defined for the M-profile.
// NOTE that the default profile is assumed to be 'A'
- if (CPUProfile.empty() || ArchProfile != llvm::ARM::PK_M)
+ if (CPUProfile.empty() || ArchProfile != llvm::ARM::ProfileKind::M)
Builder.defineMacro("__ARM_ARCH_ISA_ARM", "1");
// __ARM_ARCH_ISA_THUMB is defined to 1 if the core supports the original
if (SoftFloat)
Builder.defineMacro("__SOFTFP__");
- if (ArchKind == llvm::ARM::AK_XSCALE)
+ if (ArchKind == llvm::ARM::ArchKind::XSCALE)
Builder.defineMacro("__XSCALE__");
if (isThumb()) {
switch (ArchKind) {
default:
break;
- case llvm::ARM::AK_ARMV8_1A:
+ case llvm::ARM::ArchKind::ARMV8_1A:
getTargetDefinesARMV81A(Opts, Builder);
break;
- case llvm::ARM::AK_ARMV8_2A:
+ case llvm::ARM::ArchKind::ARMV8_2A:
getTargetDefinesARMV82A(Opts, Builder);
break;
}
enum { FP_Default, FP_VFP, FP_Neon } FPMath;
- unsigned ArchISA;
- unsigned ArchKind = llvm::ARM::AK_ARMV4T;
- unsigned ArchProfile;
+ llvm::ARM::ISAKind ArchISA;
+ llvm::ARM::ArchKind ArchKind = llvm::ARM::ArchKind::ARMV4T;
+ llvm::ARM::ProfileKind ArchProfile;
unsigned ArchVersion;
unsigned FPU : 5;
void setABIAPCS(bool IsAAPCS16);
void setArchInfo();
- void setArchInfo(unsigned Kind);
+ void setArchInfo(llvm::ARM::ArchKind Kind);
void setAtomic();
: tools::arm::getARMTargetCPU(MCPU, MArch, Triple);
StringRef Suffix =
tools::arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
- bool IsMProfile = ARM::parseArchProfile(Suffix) == ARM::PK_M;
+ bool IsMProfile = ARM::parseArchProfile(Suffix) == ARM::ProfileKind::M;
bool ThumbDefault = IsMProfile || (ARM::parseArchVersion(Suffix) == 7 &&
getTriple().isOSBinFormatMachO());
// FIXME: this is invalid for WindowsCE
if (CPU == "generic") {
Features.push_back("+neon");
} else {
- unsigned ArchKind = llvm::AArch64::parseCPUArch(CPU);
+ llvm::AArch64::ArchKind ArchKind = llvm::AArch64::parseCPUArch(CPU);
if (!llvm::AArch64::getArchFeatures(ArchKind, Features))
return false;
std::string MarchLowerCase = March.lower();
std::pair<StringRef, StringRef> Split = StringRef(MarchLowerCase).split("+");
- unsigned ArchKind = llvm::AArch64::parseArch(Split.first);
- if (ArchKind == static_cast<unsigned>(llvm::AArch64::ArchKind::AK_INVALID) ||
+ llvm::AArch64::ArchKind ArchKind = llvm::AArch64::parseArch(Split.first);
+ if (ArchKind == llvm::AArch64::ArchKind::INVALID ||
!llvm::AArch64::getArchFeatures(ArchKind, Features) ||
(Split.second.size() && !DecodeAArch64Features(D, Split.second, Features)))
return false;
// True if M-profile.
bool arm::isARMMProfile(const llvm::Triple &Triple) {
llvm::StringRef Arch = Triple.getArchName();
- unsigned Profile = llvm::ARM::parseArchProfile(Arch);
- return Profile == llvm::ARM::PK_M;
+ return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
}
// Get Arch/CPU from args.
std::pair<StringRef, StringRef> Split = ArchName.split("+");
std::string MArch = arm::getARMArch(ArchName, Triple);
- if (llvm::ARM::parseArch(MArch) == llvm::ARM::AK_INVALID ||
+ if (llvm::ARM::parseArch(MArch) == llvm::ARM::ArchKind::INVALID ||
(Split.second.size() && !DecodeARMFeatures(D, Split.second, Features)))
D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
}
if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
if (A->getOption().matches(options::OPT_mexecute_only)) {
if (getARMSubArchVersionNumber(Triple) < 7 &&
- llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::AK_ARMV6T2)
+ llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2)
D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
// FIXME: This is redundant with -mcpu, why does LLVM use this.
StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
const llvm::Triple &Triple) {
- unsigned ArchKind;
+ llvm::ARM::ArchKind ArchKind;
if (CPU == "generic") {
std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
ArchKind = llvm::ARM::parseArch(ARMArch);
- if (ArchKind == llvm::ARM::AK_INVALID)
+ if (ArchKind == llvm::ARM::ArchKind::INVALID)
// In case of generic Arch, i.e. "arm",
// extract arch from default cpu of the Triple
ArchKind = llvm::ARM::parseCPUArch(Triple.getARMCPUForArch(ARMArch));
// FIXME: horrible hack to get around the fact that Cortex-A7 is only an
// armv7k triple if it's actually been specified via "-arch armv7k".
ArchKind = (Arch == "armv7k" || Arch == "thumbv7k")
- ? (unsigned)llvm::ARM::AK_ARMV7K
+ ? llvm::ARM::ArchKind::ARMV7K
: llvm::ARM::parseCPUArch(CPU);
}
- if (ArchKind == llvm::ARM::AK_INVALID)
+ if (ArchKind == llvm::ARM::ArchKind::INVALID)
return "";
return llvm::ARM::getSubArch(ArchKind);
}
void darwin::setTripleTypeForMachOArchName(llvm::Triple &T, StringRef Str) {
const llvm::Triple::ArchType Arch = getArchTypeForMachOArchName(Str);
- unsigned ArchKind = llvm::ARM::parseArch(Str);
+ llvm::ARM::ArchKind ArchKind = llvm::ARM::parseArch(Str);
T.setArch(Arch);
if (Str == "x86_64h")
T.setArchName(Str);
- else if (ArchKind == llvm::ARM::AK_ARMV6M ||
- ArchKind == llvm::ARM::AK_ARMV7M ||
- ArchKind == llvm::ARM::AK_ARMV7EM) {
+ else if (ArchKind == llvm::ARM::ArchKind::ARMV6M ||
+ ArchKind == llvm::ARM::ArchKind::ARMV7M ||
+ ArchKind == llvm::ARM::ArchKind::ARMV7EM) {
T.setOS(llvm::Triple::UnknownOS);
T.setObjectFormat(llvm::Triple::MachO);
}
}
static const char *ArmMachOArchNameCPU(StringRef CPU) {
- unsigned ArchKind = llvm::ARM::parseCPUArch(CPU);
- if (ArchKind == llvm::ARM::AK_INVALID)
+ llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
+ if (ArchKind == llvm::ARM::ArchKind::INVALID)
return nullptr;
StringRef Arch = llvm::ARM::getArchName(ArchKind);
bool IsV7SubArch = TargetTriple.getSubArch() == llvm::Triple::ARMSubArch_v7;
bool IsThumbMode = IsThumbArch ||
Args.hasFlag(options::OPT_mthumb, options::OPT_mno_thumb, false) ||
- (IsArmArch && llvm::ARM::parseArchISA(Arch) == llvm::ARM::IK_THUMB);
+ (IsArmArch && llvm::ARM::parseArchISA(Arch) == llvm::ARM::ISAKind::THUMB);
bool IsArmV7Mode = (IsArmArch || IsThumbArch) &&
(llvm::ARM::parseArchVersion(Arch) == 7 ||
(IsArmArch && Arch == "" && IsV7SubArch));