re PR tree-optimization/88739 (Big-endian union bug)

2019-01-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/88739
	* tree-cfg.c (verify_types_in_gimple_reference): Verify
	BIT_FIELD_REFs only are applied to mode-precision operands
	when they are integral.
	(verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR.
	* tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid generating
	BIT_FIELD_REFs of non-mode-precision integral operands.

From-SVN: r268332

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index eddf1e5..724d120 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2019-01-28  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/88739
+       * tree-cfg.c (verify_types_in_gimple_reference): Verify
+       BIT_FIELD_REFs only are applied to mode-precision operands
+       when they are integral.
+       (verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR.
+       * tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid generating
+       BIT_FIELD_REFs of non-mode-precision integral operands.
+
 2019-01-27  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/87214

diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c
index 6041f42..6225427 100644 (file)
--- a/gcc/tree-cfg.c
+++ b/gcc/tree-cfg.c
@@ -3118,6 +3118,12 @@ verify_types_in_gimple_reference (tree expr, bool require_lvalue)
                     "match field size of BIT_FIELD_REF");
              return true;
            }
+         if (INTEGRAL_TYPE_P (TREE_TYPE (op))
+             && !type_has_mode_precision_p (TREE_TYPE (op)))
+           {
+             error ("BIT_FIELD_REF of non-mode-precision operand");
+             return true;
+           }
          if (!AGGREGATE_TYPE_P (TREE_TYPE (op))
              && maybe_gt (size + bitpos,
                           tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (op)))))
@@ -4319,6 +4325,12 @@ verify_gimple_assign_ternary (gassign *stmt)
          error ("invalid position or size in BIT_INSERT_EXPR");
          return true;
        }
+      if (INTEGRAL_TYPE_P (rhs1_type)
+         && !type_has_mode_precision_p (rhs1_type))
+       {
+         error ("BIT_INSERT_EXPR into non-mode-precision operand");
+         return true;
+       }
       if (INTEGRAL_TYPE_P (rhs1_type))
        {
          unsigned HOST_WIDE_INT bitpos = tree_to_uhwi (rhs3);

diff --git a/gcc/tree-ssa-sccvn.c b/gcc/tree-ssa-sccvn.c
index 7e8e05e..81604d2 100644 (file)
--- a/gcc/tree-ssa-sccvn.c
+++ b/gcc/tree-ssa-sccvn.c
@@ -2298,6 +2298,7 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *vr_,
       base2 = get_ref_base_and_extent (gimple_assign_lhs (def_stmt),
                                       &offset2, &size2, &maxsize2,
                                       &reverse);
+      tree def_rhs = gimple_assign_rhs1 (def_stmt);
       if (!reverse
          && known_size_p (maxsize2)
          && known_eq (maxsize2, size2)
@@ -2309,11 +2310,13 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *vr_,
             according to endianness.  */
          && (! INTEGRAL_TYPE_P (vr->type)
              || known_eq (ref->size, TYPE_PRECISION (vr->type)))
-         && multiple_p (ref->size, BITS_PER_UNIT))
+         && multiple_p (ref->size, BITS_PER_UNIT)
+         && (! INTEGRAL_TYPE_P (TREE_TYPE (def_rhs))
+             || type_has_mode_precision_p (TREE_TYPE (def_rhs))))
        {
          gimple_match_op op (gimple_match_cond::UNCOND,
                              BIT_FIELD_REF, vr->type,
-                             vn_valueize (gimple_assign_rhs1 (def_stmt)),
+                             vn_valueize (def_rhs),
                              bitsize_int (ref->size),
                              bitsize_int (offset - offset2));
          tree val = vn_nary_build_or_lookup (&op);