CRIS MMU Updates

* Add support for exec faults and for the k protection bit.
* Abort if search_pc causes recursive mmu faults.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4349 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-cris/helper.c b/target-cris/helper.c
index 1bd35e61c0f6144c39052f970989af5c984ddc2a..f537361c96c19747f7b1d4830bb92391a263357c 100644 (file)
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -79,6 +79,12 @@ int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
        miss = cris_mmu_translate(&res, env, address, rw, mmu_idx);
        if (miss)
        {
+               if (env->exception_index == EXCP_MMU_FAULT)
+                       cpu_abort(env, 
+                                 "CRIS: Illegal recursive bus fault."
+                                 "addr=%x rw=%d\n",
+                                 address, rw);
+
                env->exception_index = EXCP_MMU_FAULT;
                env->fault_vector = res.bf_vec;
                r = 1;
@@ -101,7 +107,7 @@ void do_interrupt(CPUState *env)
 {
        int ex_vec = -1;
 
-       D(fprintf (stderr, "exception index=%d interrupt_req=%d\n",
+       D(fprintf (logfile, "exception index=%d interrupt_req=%d\n",
                   env->exception_index,
                   env->interrupt_request));
 
@@ -133,8 +139,9 @@ void do_interrupt(CPUState *env)
        }
 
        if ((env->pregs[PR_CCS] & U_FLAG)) {
-               D(fprintf(logfile, "excp isr=%x PC=%x ERP=%x pid=%x ccs=%x cc=%d %x\n",
+               D(fprintf(logfile, "excp isr=%x PC=%x SP=%x ERP=%x pid=%x ccs=%x cc=%d %x\n",
                          ex_vec, env->pc,
+                         env->regs[R_SP],
                          env->pregs[PR_ERP], env->pregs[PR_PID],
                          env->pregs[PR_CCS],
                          env->cc_op, env->cc_mask));

diff --git a/target-cris/mmu.c b/target-cris/mmu.c
index ac711fb9838899a58e4e79293f5978803adf8cc1..a17d21d120427d6e039072536e6566adaa57f0fe 100644 (file)
--- a/target-cris/mmu.c
+++ b/target-cris/mmu.c
@@ -32,12 +32,12 @@
 
 #define D(x)
 
-static int cris_mmu_enabled(uint32_t rw_gc_cfg)
+static inline int cris_mmu_enabled(uint32_t rw_gc_cfg)
 {
        return (rw_gc_cfg & 12) != 0;
 }
 
-static int cris_mmu_segmented_addr(int seg, uint32_t rw_mm_cfg)
+static inline int cris_mmu_segmented_addr(int seg, uint32_t rw_mm_cfg)
 {
        return (1 << seg) & rw_mm_cfg;
 }
@@ -187,15 +187,26 @@ static int cris_mmu_translate_page(struct cris_mmu_result_t *res,
                set_exception_vector(0x0a, d_mmu_access);
                set_exception_vector(0x0b, d_mmu_write);
                */
-               if (!tlb_g 
+               if (!tlb_g
                    && tlb_pid != (env->pregs[PR_PID] & 0xff)) {
                        D(printf ("tlb: wrong pid %x %x pc=%x\n", 
                                 tlb_pid, env->pregs[PR_PID], env->pc));
                        match = 0;
                        res->bf_vec = vect_base;
+               } else if (cfg_k && tlb_k && usermode) {
+                       D(printf ("tlb: kernel protected %x lo=%x pc=%x\n", 
+                                 vaddr, lo, env->pc));
+                       match = 0;
+                       res->bf_vec = vect_base + 2;
                } else if (rw == 1 && cfg_w && !tlb_w) {
-                       D(printf ("tlb: write protected %x lo=%x\n", 
-                               vaddr, lo));
+                       D(printf ("tlb: write protected %x lo=%x pc=%x\n", 
+                                 vaddr, lo, env->pc));
+                       match = 0;
+                       /* write accesses never go through the I mmu.  */
+                       res->bf_vec = vect_base + 3;
+               } else if (rw == 2 && cfg_x && !tlb_x) {
+                       D(printf ("tlb: exec protected %x lo=%x pc=%x\n", 
+                                vaddr, lo, env->pc));
                        match = 0;
                        res->bf_vec = vect_base + 3;
                } else if (cfg_v && !tlb_v) {

diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
index 7c629c7559574dc62df8e033ec7fda21ff2adee3..dfc213c7aa58ecd5dcfc586c98f8c3f147ce9b4d 100644 (file)
--- a/target-cris/op_helper.c
+++ b/target-cris/op_helper.c
@@ -60,8 +60,8 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
     saved_env = env;
     env = cpu_single_env;
 
-    D(fprintf(logfile, "%s ra=%x acr=%x %x\n", __func__, retaddr,
-           env->regs[R_ACR], saved_env->regs[R_ACR]));
+    D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__, 
+            env->pc, env->debug1, retaddr));
     ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
     if (__builtin_expect(ret, 0)) {
         if (retaddr) {
@@ -89,7 +89,7 @@ void helper_tlb_update(uint32_t T0)
                return;
 
        vaddr = cris_mmu_tlb_latest_update(env, T0);
-       D(printf("flush old_vaddr=%x vaddr=%x T0=%x\n", vaddr, 
+       D(fprintf(logfile, "flush old_vaddr=%x vaddr=%x T0=%x\n", vaddr, 
                 env->sregs[SFR_R_MM_CAUSE] & TARGET_PAGE_MASK, T0));
        tlb_flush_page(env, vaddr);
 #endif