this:
%ESI<def> = MOV32rr %EDI<kill>
ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
%reg1027<def> = MOVZX64rr32 %ESI
%reg1027<def> = ADD64ri8 %reg1027, 15, %EFLAGS<imp-def,dead>
%reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
%RDI<def> = MOV64rr %RSP
%RDI<def> = SUB64rr %RDI, %reg1027<kill>, %EFLAGS<imp-def,dead>
%RSP<def> = MOV64rr %RDI
into this:
4 %reg1024<def> = MOV32rr %EDI<kill>
12 ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
20 %reg1025<def> = MOVZX64rr32 %reg1024
28 %reg1026<def> = MOV64rr %reg1025<kill>
36 %reg1026<def> = ADD64ri8 %reg1026, 15, %EFLAGS<imp-def,dead>
44 %reg1027<def> = MOV64rr %reg1026<kill>
52 %reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
60 %reg1028<def> = MOV64rr %RSP
68 %reg1029<def> = MOV64rr %reg1028<kill>
76 %reg1029<def> = SUB64rr %reg1029, %reg1027<kill>, %EFLAGS<imp-def,dead>
84 %RSP<def> = MOV64rr %reg1029
This helps greatly when debugging register allocation and coalescing
problems.
llvm-svn: 76615
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Allocator.h"
+#include "llvm/Support/Dump.h"
#include <cmath>
+#include <sstream>
namespace llvm {
/// FunctionSize - The number of instructions present in the function
uint64_t FunctionSize;
- typedef DenseMap<MachineInstr*, unsigned> Mi2IndexMap;
+ typedef DenseMap<const MachineInstr*, unsigned> Mi2IndexMap;
Mi2IndexMap mi2iMap_;
typedef std::vector<MachineInstr*> Index2MiMap;
}
/// getInstructionIndex - returns the base index of instr
- unsigned getInstructionIndex(MachineInstr* instr) const {
+ unsigned getInstructionIndex(const MachineInstr* instr) const {
Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
assert(it != mi2iMap_.end() && "Invalid instruction!");
return it->second;
void printRegName(unsigned reg) const;
};
+ // IntervalPrefixPrinter - Print live interval indices before each
+ // instruction.
+ class IntervalPrefixPrinter : public PrefixPrinter {
+ private:
+ const LiveIntervals &liinfo;
+
+ public:
+ IntervalPrefixPrinter(const LiveIntervals &lii)
+ : liinfo(lii) {};
+
+ std::string operator()(const MachineBasicBlock &) const {
+ return("");
+ };
+
+ std::string operator()(const MachineInstr &instr) const {
+ std::stringstream out;
+ out << liinfo.getInstructionIndex(&instr);
+ return(out.str());
+ };
+ };
} // End llvm namespace
#endif
i2miMap_.resize(highestSlot + 1);
for (Mi2IndexMap::iterator MI = mi2iMap_.begin(), ME = mi2iMap_.end();
MI != ME; ++MI) {
- i2miMap_[MI->second] = MI->first;
+ i2miMap_[MI->second] = const_cast<MachineInstr *>(MI->first);
}
}
}
O << "********** MACHINEINSTRS **********\n";
- for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
- mbbi != mbbe; ++mbbi) {
- O << ((Value*)mbbi->getBasicBlock())->getName() << ":\n";
- for (MachineBasicBlock::iterator mii = mbbi->begin(),
- mie = mbbi->end(); mii != mie; ++mii) {
- O << getInstructionIndex(mii) << '\t' << *mii;
- }
- }
+ mf_->print(O, IntervalPrefixPrinter(*this));
}
/// conflictsWithPhysRegDef - Returns true if the specified register