radeon/vcn: Enable the AV1 decode p010 mode
authorLeo Liu <leo.liu@amd.com>
Sat, 7 Aug 2021 21:07:36 +0000 (17:07 -0400)
committerLeo Liu <leo.liu@amd.com>
Fri, 13 Aug 2021 13:24:01 +0000 (09:24 -0400)
It will still support 8 bits dithering mode decode.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12307>

src/gallium/drivers/radeon/radeon_vcn_dec.c

index ee6ff99..fc86daf 100644 (file)
@@ -853,14 +853,14 @@ static rvcn_dec_message_av1_t get_av1_msg(struct radeon_decoder *dec,
       }
    }
 
-   result.p010_mode = 0;
-   result.msb_mode = 0;
-   if (!pic->picture_parameter.bit_depth_idx) {
-      result.luma_10to8 = 0;
-      result.chroma_10to8 = 0;
-   } else {
-      result.luma_10to8 = 1;
-      result.chroma_10to8 = 1;
+   if (pic->picture_parameter.bit_depth_idx) {
+      if (target->buffer_format == PIPE_FORMAT_P010 || target->buffer_format == PIPE_FORMAT_P016) {
+         result.p010_mode = 1;
+         result.msb_mode = 1;
+      } else {
+         result.luma_10to8 = 1;
+         result.chroma_10to8 = 1;
+      }
    }
 
    result.preskip_segid = 0;