ARM64: dts: marvell: armada-cp110: Add registers clock for the NAND node
authorGregory CLEMENT <gregory.clement@bootlin.com>
Wed, 14 Mar 2018 16:19:27 +0000 (17:19 +0100)
committerGregory CLEMENT <gregory.clement@bootlin.com>
Mon, 19 Mar 2018 16:13:50 +0000 (17:13 +0100)
This extra clock is needed to access the registers of the NAND controller
used on CP110 component of the Armada 7K/8K SoCs.

This follow the changes already made in the binding documentation (as
well as in the driver): "mtd: nand: marvell: Fix clock resource by adding
a register clock"

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm64/boot/dts/marvell/armada-cp110.dtsi

index b6947fc..9ffb86b 100644 (file)
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&CP110_LABEL(clk) 1 2>;
+                       clock-names = "core", "reg";
+                       clocks = <&CP110_LABEL(clk) 1 2>,
+                                <&CP110_LABEL(clk) 1 17>;
                        marvell,system-controller = <&CP110_LABEL(syscon0)>;
                        status = "disabled";
                };