arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM

i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam.

General features:
- NXP i.MX8M Plus
- Up to 4GB LDDR4
- 8 eMMC
- Gigabit Ethernet
- USB 3.0, 2.0 Host/OTG
- PCIe 3.0 interface
- I2S
- LVDS
- rest of i.MX8M Plus features

i.Core MX8M Plus needs to mount on top of Engicam baseboards
for creating complete platform solutions.

Add support for it.

Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp.dtsi
new file mode 100644 (file)
index 0000000..5116079
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp.dtsi
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutons(India)
+ */
+
+/ {
+       compatible = "engicam,icore-mx8mp", "fsl,imx8mp";
+};
+
+&A53_0 {
+       cpu-supply = <&buck2>;
+};
+
+&A53_1 {
+       cpu-supply = <&buck2>;
+};
+
+&A53_2 {
+       cpu-supply = <&buck2>;
+};
+
+&A53_3 {
+       cpu-supply = <&buck2>;
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       pca9450: pmic@25 {
+               compatible = "nxp,pca9450c";
+               interrupt-parent = <&gpio3>;
+               interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pmic>;
+               reg = <0x25>;
+
+               regulators {
+                       buck1: BUCK1 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <720000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-name = "BUCK1";
+                               regulator-ramp-delay = <3125>;
+                       };
+
+                       buck2: BUCK2  {
+                               nxp,dvs-run-voltage = <950000>;
+                               nxp,dvs-standby-voltage = <850000>;
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1025000>;
+                               regulator-min-microvolt = <720000>;
+                               regulator-name = "BUCK2";
+                               regulator-ramp-delay = <3125>;
+                       };
+
+                       buck4: BUCK4 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <3600000>;
+                               regulator-min-microvolt = <3000000>;
+                               regulator-name = "BUCK4";
+                       };
+
+                       buck5: BUCK5 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1950000>;
+                               regulator-min-microvolt = <1650000>;
+                               regulator-name = "BUCK5";
+                       };
+
+                       buck6: BUCK6 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1155000>;
+                               regulator-min-microvolt = <1045000>;
+                               regulator-name = "BUCK6";
+                       };
+
+                       ldo1: LDO1 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1950000>;
+                               regulator-min-microvolt = <1650000>;
+                               regulator-name = "LDO1";
+                       };
+
+                       ldo3: LDO3 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <1890000>;
+                               regulator-min-microvolt = <1710000>;
+                               regulator-name = "LDO3";
+                       };
+
+                       ldo5: LDO5 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-name = "LDO5";
+                       };
+               };
+       };
+};
+
+/* EMMC */
+&usdhc3 {
+       bus-width = <8>;
+       non-removable;
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL         0x400001c3
+                       MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA         0x400001c3
+               >;
+       };
+
+       pinctrl_pmic: pmicgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01       0x41
+               >;
+       };
+
+       pinctrl_usdhc3: usdhc3grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK      0x190
+                       MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD      0x1d0
+                       MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0  0x1d0
+                       MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1  0x1d0
+                       MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2  0x1d0
+                       MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3  0x1d0
+                       MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4    0x1d0
+                       MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5   0x1d0
+                       MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6   0x1d0
+                       MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7     0x1d0
+                       MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE  0x190
+               >;
+       };
+
+       pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK      0x194
+                       MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD      0x1d4
+                       MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0  0x1d4
+                       MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1  0x1d4
+                       MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2  0x1d4
+                       MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3  0x1d4
+                       MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4    0x1d4
+                       MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5   0x1d4
+                       MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6   0x1d4
+                       MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7     0x1d4
+                       MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE  0x194
+               >;
+       };
+
+       pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK      0x196
+                       MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD      0x1d6
+                       MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0  0x1d6
+                       MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1  0x1d6
+                       MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2  0x1d6
+                       MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3  0x1d6
+                       MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4    0x1d6
+                       MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5   0x1d6
+                       MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6   0x1d6
+                       MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7     0x1d6
+                       MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE  0x196
+               >;
+       };
+};