/* OMAP2 general purpose memory controller */
struct omap_gpmc_s;
struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu,
- target_phys_addr_t base, qemu_irq irq);
+ target_phys_addr_t base,
+ qemu_irq irq, qemu_irq drq);
void omap_gpmc_reset(struct omap_gpmc_s *s);
void omap_gpmc_attach(struct omap_gpmc_s *s, int cs, MemoryRegion *iomem);
void omap_gpmc_attach_nand(struct omap_gpmc_s *s, int cs, DeviceState *nand);
sysbus_mmio_map(busdev, 4, omap_l4_region_base(ta, 5));
s->sdrc = omap_sdrc_init(0x68009000);
- s->gpmc = omap_gpmc_init(s, 0x6800a000, s->irq[0][OMAP_INT_24XX_GPMC_IRQ]);
+ s->gpmc = omap_gpmc_init(s, 0x6800a000, s->irq[0][OMAP_INT_24XX_GPMC_IRQ],
+ s->drq[OMAP24XX_DMA_GPMC]);
dinfo = drive_get(IF_SD, 0, 0);
if (!dinfo) {
/* General-Purpose Memory Controller */
struct omap_gpmc_s {
qemu_irq irq;
+ qemu_irq drq;
MemoryRegion iomem;
int accept_256;
};
struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu,
- target_phys_addr_t base, qemu_irq irq)
+ target_phys_addr_t base,
+ qemu_irq irq, qemu_irq drq)
{
int cs;
struct omap_gpmc_s *s = (struct omap_gpmc_s *)
memory_region_add_subregion(get_system_memory(), base, &s->iomem);
s->irq = irq;
+ s->drq = drq;
s->accept_256 = cpu_is_omap3630(mpu);
s->revision = cpu_class_omap3(mpu) ? 0x50 : 0x20;
omap_gpmc_reset(s);