riscv:linux:drm:
authorshengyang.chen <shengyang.chen@starfivetech.com>
Fri, 9 Sep 2022 06:35:47 +0000 (14:35 +0800)
committershengyang.chen <shengyang.chen@starfivetech.com>
Fri, 9 Sep 2022 07:41:21 +0000 (15:41 +0800)
update code after pll switch to 1188m
based on new pll config, fix rgb bug caused by old pll
------------------------------------------------------------
update code after review

Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
drivers/gpu/drm/verisilicon/vs_dc.c

index 53fbe52..e4d5dd6 100755 (executable)
@@ -811,7 +811,7 @@ static void vs_dc_enable(struct device *dev, struct drm_crtc *crtc)
                        dc->pix_clk_rate = mode->clock;
                }
 
-               clk_set_parent(dc->dc8200_clk_pix1, dc->dc8200_pix0 );//child,parent
+               clk_set_parent(dc->dc8200_clk_pix1, dc->dc8200_pix0);
                udelay(1000);
                dc_hw_set_out(&dc->hw, OUT_DPI, display.id);
        } else {