arm64: dts: stratix10: enable i2c, add i2c periperals

Add clock for i2c
Enable i2c1
Set the i2c bus speed to 100KHz
Add the following i2c peripherals
* ds1339 RTC
* 24c32 EEPROM
* max1619 temperature monitor
* ltc2497 ADC
  * Add a fixed regulator for the ADC's Vref.

This requires Dinh Nguyen's Stratix10 clock driver
("clk: socfpga: stratix10: add clock driver for Stratix10 platform")

Signed-off-by: Alan Tull <atull@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 0e267c8..21d906e 100644 (file)
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -207,6 +207,7 @@
                        reg = <0xffc02800 0x100>;
                        interrupts = <0 103 4>;
                        resets = <&rst I2C0_RESET>;
+                       clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                        status = "disabled";
                };
 
@@ -217,6 +218,7 @@
                        reg = <0xffc02900 0x100>;
                        interrupts = <0 104 4>;
                        resets = <&rst I2C1_RESET>;
+                       clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                        status = "disabled";
                };
 
@@ -227,6 +229,7 @@
                        reg = <0xffc02a00 0x100>;
                        interrupts = <0 105 4>;
                        resets = <&rst I2C2_RESET>;
+                       clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                        status = "disabled";
                };
 
@@ -237,6 +240,7 @@
                        reg = <0xffc02b00 0x100>;
                        interrupts = <0 106 4>;
                        resets = <&rst I2C3_RESET>;
+                       clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                        status = "disabled";
                };
 
@@ -247,6 +251,7 @@
                        reg = <0xffc02c00 0x100>;
                        interrupts = <0 107 4>;
                        resets = <&rst I2C4_RESET>;
+                       clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                        status = "disabled";
                };
 

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index bec15e8..d03df18 100644 (file)
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -51,6 +51,13 @@
                reg = <0 0 0 0>;
        };
 
+       ref_033v: 033-v-ref {
+               compatible = "regulator-fixed";
+               regulator-name = "0.33V";
+               regulator-min-microvolt = <330000>;
+               regulator-max-microvolt = <330000>;
+       };
+
        soc {
                clocks {
                        osc1 {
@@ -113,3 +120,30 @@
 &watchdog0 {
        status = "okay";
 };
+
+&i2c1 {
+       status = "okay";
+       clock-frequency = <100000>;
+
+       adc@14 {
+               compatible = "lltc,ltc2497";
+               reg = <0x14>;
+               vref-supply = <&ref_033v>;
+       };
+
+       temp@4c {
+               compatible = "maxim,max1619";
+               reg = <0x4c>;
+       };
+
+       eeprom@51 {
+               compatible = "atmel,24c32";
+               reg = <0x51>;
+               pagesize = <32>;
+       };
+
+       rtc@68 {
+               compatible = "dallas,ds1339";
+               reg = <0x68>;
+       };
+};