[AArch64] Fix illegal assembly 'eon v1, v2, v3'

        PR target/64997
        * config/aarch64/aarch64.md (*xor_one_cmpl<mode>3): Use FP_REGNUM_P
        as split condition; force split via '#' in output pattern.

From-SVN: r220969

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d4304cd..1e2b609 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-02-25  Alan Lawrence  <alan.lawrence@arm.com>
+
+       PR target/64997
+       * config/aarch64/aarch64.md (*xor_one_cmpl<mode>3): Use FP_REGNUM_P
+       as split condition; force split via '#' in output pattern.
+
 2015-02-25  Richard Biener  <rguenther@suse.de>
        Kai Tietz  <ktietz@redhat.com>
 

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 8f157ce..7103e0d 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3065,8 +3065,10 @@
         (not:GPI (xor:GPI (match_operand:GPI 1 "register_operand" "r,?w")
                           (match_operand:GPI 2 "register_operand" "r,w"))))]
   ""
-  "eon\\t%<w>0, %<w>1, %<w>2" ;; For GPR registers (only).
-  "reload_completed && (which_alternative == 1)" ;; For SIMD registers.
+  "@
+  eon\\t%<w>0, %<w>1, %<w>2
+  #"
+  "reload_completed && FP_REGNUM_P (REGNO (operands[0]))" ;; For SIMD registers.
   [(set (match_operand:GPI 0 "register_operand" "=w")
         (xor:GPI (match_operand:GPI 1 "register_operand" "w")
                  (match_operand:GPI 2 "register_operand" "w")))