[InstCombine] Add foldAndOfICmps test cases inspired by PR42691.

icmp ne %x, INT_MIN can be treated similarly to icmp sgt %x, INT_MIN.
icmp ne %x, INT_MAX can be treated similarly to icmp slt %x, INT_MAX.
icmp ne %x, UINT_MAX can be treated similarly to icmp ult %x, UINT_MAX.

We already treat icmp ne %x, 0 similarly to icmp ugt %x, 0

llvm-svn: 366662

diff --git a/llvm/test/Transforms/InstCombine/and-or-icmps.ll b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
index 60576d0..481e0f2 100644 (file)
--- a/llvm/test/Transforms/InstCombine/and-or-icmps.ll
+++ b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
@@ -338,3 +338,42 @@ define i1 @PR42691_7(i32 %x) {
   %c = or i1 %c1, %c2
   ret i1 %c
 }
+
+define i1 @PR42691_8(i32 %x) {
+; CHECK-LABEL: @PR42691_8(
+; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 %x, 14
+; CHECK-NEXT:    [[C2:%.*]] = icmp ne i32 %x, -2147483648
+; CHECK-NEXT:    [[C:%.*]] = and i1 [[C1]], [[C2]]
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %c1 = icmp slt i32 %x, 14
+  %c2 = icmp ne i32 %x, -2147483648
+  %c = and i1 %c1, %c2
+  ret i1 %c
+}
+
+define i1 @PR42691_9(i32 %x) {
+; CHECK-LABEL: @PR42691_9(
+; CHECK-NEXT:    [[C1:%.*]] = icmp sgt i32 %x, 13
+; CHECK-NEXT:    [[C2:%.*]] = icmp ne i32 %x, 2147483647
+; CHECK-NEXT:    [[C:%.*]] = and i1 [[C1]], [[C2]]
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %c1 = icmp sgt i32 %x, 13
+  %c2 = icmp ne i32 %x, 2147483647
+  %c = and i1 %c1, %c2
+  ret i1 %c
+}
+
+define i1 @PR42691_10(i32 %x) {
+; CHECK-LABEL: @PR42691_10(
+; CHECK-NEXT:    [[C1:%.*]] = icmp ugt i32 %x, 13
+; CHECK-NEXT:    [[C2:%.*]] = icmp ne i32 %x, -1
+; CHECK-NEXT:    [[C:%.*]] = and i1 [[C1]], [[C2]]
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %c1 = icmp ugt i32 %x, 13
+  %c2 = icmp ne i32 %x, 4294967295
+  %c = and i1 %c1, %c2
+  ret i1 %c
+}