mmc: dw_mmc: fixed wrong bit operation for SDMMC_GET_FCNT()
authorJaehoon Chung <jh80.chung@samsung.com>
Thu, 5 Jan 2012 10:12:57 +0000 (19:12 +0900)
committerChris Ball <cjb@laptop.org>
Thu, 12 Jan 2012 20:17:15 +0000 (15:17 -0500)
In status register, fifo_count is bit[29:17].
(0x1FFF is correct)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Will Newton <will.newton@imgtec.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
drivers/mmc/host/dw_mmc.h

index 72c071f..df392a1 100644 (file)
 #define SDMMC_CMD_RESP_EXP             BIT(6)
 #define SDMMC_CMD_INDX(n)              ((n) & 0x1F)
 /* Status register defines */
-#define SDMMC_GET_FCNT(x)              (((x)>>17) & 0x1FF)
+#define SDMMC_GET_FCNT(x)              (((x)>>17) & 0x1FFF)
 /* Internal DMAC interrupt defines */
 #define SDMMC_IDMAC_INT_AI             BIT(9)
 #define SDMMC_IDMAC_INT_NI             BIT(8)