MIPS: mscc: ocelot: rename pinctrl nodes

The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
index e51db65..cfc219a 100644 (file)
--- a/arch/mips/boot/dts/mscc/ocelot.dtsi
+++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
@@ -225,7 +225,7 @@
                                function = "uart2";
                        };
 
-                       miim1: miim1 {
+                       miim1_pins: miim1-pins {
                                pins = "GPIO_14", "GPIO_15";
                                function = "miim";
                        };
@@ -261,7 +261,7 @@
                        reg = <0x10700c0 0x24>;
                        interrupts = <15>;
                        pinctrl-names = "default";
-                       pinctrl-0 = <&miim1>;
+                       pinctrl-0 = <&miim1_pins>;
                        status = "disabled";
                };
 

diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts
index bd24069..d348742 100644 (file)
--- a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts
+++ b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts
@@ -22,12 +22,12 @@
 };
 
 &gpio {
-       phy_int_pins: phy_int_pins {
+       phy_int_pins: phy-int-pins {
                pins = "GPIO_4";
                function = "gpio";
        };
 
-       phy_load_save_pins: phy_load_save_pins {
+       phy_load_save_pins: phy-load-save-pins {
                pins = "GPIO_10";
                function = "ptp2";
        };
@@ -40,7 +40,7 @@
 &mdio1 {
        status = "okay";
        pinctrl-names = "default";
-       pinctrl-0 = <&miim1>, <&phy_int_pins>, <&phy_load_save_pins>;
+       pinctrl-0 = <&miim1_pins>, <&phy_int_pins>, <&phy_load_save_pins>;
 
        phy7: ethernet-phy@0 {
                reg = <0>;