arm64: dts: qcom: sm8550: Mark UFS controller as cache coherent
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Wed, 8 Mar 2023 05:46:30 +0000 (11:16 +0530)
committerBjorn Andersson <andersson@kernel.org>
Thu, 9 Mar 2023 21:56:25 +0000 (13:56 -0800)
The UFS controller on SM8550 supports cache coherency, hence add the
"dma-coherent" property to mark it as such.

Fixes: 35cf1aaab169 ("arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308054630.7202-1-manivannan.sadhasivam@linaro.org
arch/arm64/boot/dts/qcom/sm8550.dtsi

index 24aa724..5d08883 100644 (file)
                        required-opps = <&rpmhpd_opp_nom>;
 
                        iommus = <&apps_smmu 0x60 0x0>;
+                       dma-coherent;
 
                        interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>,
                                        <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>;