drm/amd/display: enable smu set dcfclk
authorLewis Huang <Lewis.Huang@amd.com>
Fri, 26 Jul 2019 18:02:03 +0000 (14:02 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 17 Oct 2019 20:30:02 +0000 (16:30 -0400)
[Why]
SMU fixed this issue after version 0x370c00

[How]
enable smu send message to set dcfclk after smu version 0x370c00

Signed-off-by: Lewis Huang <Lewis.Huang@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c

index db28e91..2650776 100644 (file)
@@ -124,7 +124,7 @@ int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int reque
 {
        int actual_dcfclk_set_mhz = -1;
 
-       if (clk_mgr->smu_ver < 0xFFFFFFFF)
+       if (clk_mgr->smu_ver < 0x370c00)
                return actual_dcfclk_set_mhz;
 
        actual_dcfclk_set_mhz = rn_vbios_smu_send_msg_with_param(
@@ -139,7 +139,7 @@ int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int
 {
        int actual_min_ds_dcfclk_mhz = -1;
 
-       if (clk_mgr->smu_ver < 0xFFFFFFFF)
+       if (clk_mgr->smu_ver < 0x370c00)
                return actual_min_ds_dcfclk_mhz;
 
        actual_min_ds_dcfclk_mhz = rn_vbios_smu_send_msg_with_param(