def : Pat<(srl (bswap top16Zero:$Rn), (i64 16)), (REV16Wr GPR32:$Rn)>;
def : Pat<(srl (bswap top32Zero:$Rn), (i64 32)), (REV32Xr GPR64:$Rn)>;
+def : Pat<(or (and (srl GPR64:$Rn, (i64 8)), (i64 0x00ff00ff00ff00ff)),
+ (and (shl GPR64:$Rn, (i64 8)), (i64 0xff00ff00ff00ff00))),
+ (REV16Xr GPR64:$Rn)>;
+
//===----------------------------------------------------------------------===//
// Bitfield immediate extraction instruction.
//===----------------------------------------------------------------------===//
ret void
}
declare i32 @gid_tbl_len(...)
+
+; 64-bit REV16 is *not* a swap then a 16-bit rotation:
+; 01234567 ->(bswap) 76543210 ->(rotr) 10765432
+; 01234567 ->(rev16) 10325476
+; Optimize patterns where rev16 can be generated for a 64-bit input.
+define i64 @test_rev16_x_hwbyteswaps(i64 %a) nounwind {
+; CHECK-LABEL: test_rev16_x_hwbyteswaps:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: rev16 x0, x0
+; CHECK-NEXT: ret
+;
+; GISEL-LABEL: test_rev16_x_hwbyteswaps:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: rev16 x0, x0
+; GISEL-NEXT: ret
+entry:
+ %0 = lshr i64 %a, 8
+ %1 = and i64 %0, 71777214294589695
+ %2 = shl i64 %a, 8
+ %3 = and i64 %2, -71777214294589696
+ %4 = or i64 %1, %3
+ ret i64 %4
+}