drm/i2c/tda998x: Hardcode register values for Starlight
authorsw.multimedia <sw.multimedia@starfivetech.com>
Tue, 31 Aug 2021 08:48:57 +0000 (16:48 +0800)
committerŁukasz Stelmach <l.stelmach@samsung.com>
Thu, 9 Feb 2023 19:07:49 +0000 (20:07 +0100)
A proper solution to this hack should be found.

Signed-off-by: jack.zhu <jack.zhu@starfivetech.com>
Signed-off-by: keith.zhao <keith.zhao@starfivetech.com>
drivers/gpu/drm/i2c/tda998x_drv.c

index d444e7f..bf40966 100644 (file)
@@ -1604,7 +1604,9 @@ static void tda998x_bridge_mode_set(struct drm_bridge *bridge,
                reg |= VIP_CNTRL_3_H_TGL;
        if (mode->flags & DRM_MODE_FLAG_NVSYNC)
                reg |= VIP_CNTRL_3_V_TGL;
-       reg_write(priv, REG_VIP_CNTRL_3, reg);
+       //reg_write(priv, REG_VIP_CNTRL_3, reg);
+       reg_write(priv, REG_VIP_CNTRL_3, 0x26);
+       reg_write(priv, REG_VIDFORMAT, 0x06);
 
        reg_write(priv, REG_VIDFORMAT, 0x00);
        reg_write16(priv, REG_REFPIX_MSB, ref_pix);
@@ -1642,7 +1644,8 @@ static void tda998x_bridge_mode_set(struct drm_bridge *bridge,
                reg |= TBG_CNTRL_1_H_TGL;
        if (mode->flags & DRM_MODE_FLAG_NVSYNC)
                reg |= TBG_CNTRL_1_V_TGL;
-       reg_write(priv, REG_TBG_CNTRL_1, reg);
+       //reg_write(priv, REG_TBG_CNTRL_1, reg);
+       reg_write(priv, REG_TBG_CNTRL_1, 0x46);
 
        /* must be last register set: */
        reg_write(priv, REG_TBG_CNTRL_0, 0);