arm64: tegra: Add SOR0_OUT clock on Tegra210
authorThierry Reding <treding@nvidia.com>
Fri, 28 Jun 2019 08:59:19 +0000 (10:59 +0200)
committerThierry Reding <treding@nvidia.com>
Tue, 29 Oct 2019 19:30:07 +0000 (20:30 +0100)
This clock was not previously used because it is a fixed clock. However,
adding it here allows operating systems to deal with SOR0 the same way
as SOR1.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra210.dtsi

index d21cf27..a20cd36 100644 (file)
                        reg = <0x0 0x54540000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&tegra_car TEGRA210_CLK_SOR0>,
+                                <&tegra_car TEGRA210_CLK_SOR0_OUT>,
                                 <&tegra_car TEGRA210_CLK_PLL_D_OUT0>,
                                 <&tegra_car TEGRA210_CLK_PLL_DP>,
                                 <&tegra_car TEGRA210_CLK_SOR_SAFE>;
-                       clock-names = "sor", "parent", "dp", "safe";
+                       clock-names = "sor", "out", "parent", "dp", "safe";
                        resets = <&tegra_car 182>;
                        reset-names = "sor";
                        pinctrl-0 = <&state_dpaux_aux>;