struct tasklet_struct tasklet;
const char *name;
const struct pl08x_channel_data *cd;
- dma_addr_t src_addr;
- dma_addr_t dst_addr;
+ struct dma_slave_config cfg;
u32 src_cctl;
u32 dst_cctl;
enum dma_transfer_direction runtime_direction;
return -EINVAL;
}
+ plchan->cfg = *config;
+
cctl |= width << PL080_CONTROL_SWIDTH_SHIFT;
cctl |= width << PL080_CONTROL_DWIDTH_SHIFT;
plchan->device_fc = config->device_fc;
if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
- plchan->src_addr = config->src_addr;
plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR |
pl08x_select_bus(plchan->cd->periph_buses,
pl08x->mem_buses);
} else {
- plchan->dst_addr = config->dst_addr;
plchan->dst_cctl = pl08x_cctl(cctl) | PL080_CONTROL_SRC_INCR |
pl08x_select_bus(pl08x->mem_buses,
plchan->cd->periph_buses);
if (direction == DMA_MEM_TO_DEV) {
txd->cctl = plchan->dst_cctl;
- slave_addr = plchan->dst_addr;
+ slave_addr = plchan->cfg.dst_addr;
} else if (direction == DMA_DEV_TO_MEM) {
txd->cctl = plchan->src_cctl;
- slave_addr = plchan->src_addr;
+ slave_addr = plchan->cfg.src_addr;
} else {
pl08x_free_txd(pl08x, txd);
dev_err(&pl08x->adev->dev,
chan->slave = true;
chan->name = chan->cd->bus_id;
- chan->src_addr = chan->cd->addr;
- chan->dst_addr = chan->cd->addr;
+ chan->cfg.src_addr = chan->cd->addr;
+ chan->cfg.dst_addr = chan->cd->addr;
chan->src_cctl = cctl | PL080_CONTROL_DST_INCR |
pl08x_select_bus(chan->cd->periph_buses, chan->host->mem_buses);
chan->dst_cctl = cctl | PL080_CONTROL_SRC_INCR |