usb: chipidea: add freescale imx28 special write register method

According to Freescale imx28 Errata, "ENGR119653 USB: ARM to USB
register error issue", All USB register write operations must
use the ARM SWP instruction. So, we implement special hw_write
and hw_test_and_clear for imx28.

Discussion for it at below:
http://marc.info/?l=linux-usb&m=137996395529294&w=2

This patch is needed for stable tree 3.11+.

Cc: stable@vger.kernel.org
Cc: robert.hodaszi@digi.com
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Tested-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index a71dc1c..88b80f7 100644 (file)
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -164,6 +164,7 @@ struct hw_bank {
  * @id_event: indicates there is an id event, and handled at ci_otg_work
  * @b_sess_valid_event: indicates there is a vbus event, and handled
  * at ci_otg_work
+ * @imx28_write_fix: Freescale imx28 needs swp instruction for writing
  */
 struct ci_hdrc {
        struct device                   *dev;
@@ -202,6 +203,7 @@ struct ci_hdrc {
        struct dentry                   *debugfs;
        bool                            id_event;
        bool                            b_sess_valid_event;
+       bool                            imx28_write_fix;
 };
 
 static inline struct ci_role_driver *ci_role(struct ci_hdrc *ci)
@@ -250,6 +252,26 @@ static inline u32 hw_read(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask)
        return ioread32(ci->hw_bank.regmap[reg]) & mask;
 }
 
+#ifdef CONFIG_SOC_IMX28
+static inline void imx28_ci_writel(u32 val, volatile void __iomem *addr)
+{
+       __asm__ ("swp %0, %0, [%1]" : : "r"(val), "r"(addr));
+}
+#else
+static inline void imx28_ci_writel(u32 val, volatile void __iomem *addr)
+{
+}
+#endif
+
+static inline void __hw_write(struct ci_hdrc *ci, u32 val,
+               void __iomem *addr)
+{
+       if (ci->imx28_write_fix)
+               imx28_ci_writel(val, addr);
+       else
+               iowrite32(val, addr);
+}
+
 /**
  * hw_write: writes to a hw register
  * @reg:  register index
@@ -263,7 +285,7 @@ static inline void hw_write(struct ci_hdrc *ci, enum ci_hw_regs reg,
                data = (ioread32(ci->hw_bank.regmap[reg]) & ~mask)
                        | (data & mask);
 
-       iowrite32(data, ci->hw_bank.regmap[reg]);
+       __hw_write(ci, data, ci->hw_bank.regmap[reg]);
 }
 
 /**
@@ -278,7 +300,7 @@ static inline u32 hw_test_and_clear(struct ci_hdrc *ci, enum ci_hw_regs reg,
 {
        u32 val = ioread32(ci->hw_bank.regmap[reg]) & mask;
 
-       iowrite32(val, ci->hw_bank.regmap[reg]);
+       __hw_write(ci, val, ci->hw_bank.regmap[reg]);
        return val;
 }
 

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 458d8e4..0ead0b4 100644 (file)
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -548,6 +548,8 @@ static int ci_hdrc_probe(struct platform_device *pdev)
 
        ci->dev = dev;
        ci->platdata = dev->platform_data;
+       ci->imx28_write_fix = !!(ci->platdata->flags &
+               CI_HDRC_IMX28_WRITE_FIX);
 
        ret = hw_device_init(ci, base);
        if (ret < 0) {

diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 526cd77..a8ac6c1 100644 (file)
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -65,6 +65,7 @@ static int host_start(struct ci_hdrc *ci)
        ehci->caps = ci->hw_bank.cap;
        ehci->has_hostpc = ci->hw_bank.lpm;
        ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
+       ehci->imx28_write_fix = ci->imx28_write_fix;
 
        if (ci->platdata->reg_vbus) {
                ret = regulator_enable(ci->platdata->reg_vbus);

diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 7d39967..708bd11 100644 (file)
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -24,6 +24,7 @@ struct ci_hdrc_platform_data {
         * but otg is not supported (no register otgsc).
         */
 #define CI_HDRC_DUAL_ROLE_NOT_OTG      BIT(4)
+#define CI_HDRC_IMX28_WRITE_FIX                BIT(5)
        enum usb_dr_mode        dr_mode;
 #define CI_HDRC_CONTROLLER_RESET_EVENT         0
 #define CI_HDRC_CONTROLLER_STOPPED_EVENT       1