intel/common: add detection of protected context support

v2: Add anv bits
    Fix missing i915 extension chaining helper

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>

diff --git a/src/intel/common/intel_gem.c b/src/intel/common/intel_gem.c
index 4ca2e45..6550c02 100644 (file)
--- a/src/intel/common/intel_gem.c
+++ b/src/intel/common/intel_gem.c
@@ -141,6 +141,7 @@ intel_gem_create_context_engines(int fd,
    return create.ctx_id;
 }
 
+
 bool intel_gem_read_render_timestamp(int fd, uint64_t *value)
 {
    struct drm_i915_reg_read reg_read = {
@@ -152,3 +153,41 @@ bool intel_gem_read_render_timestamp(int fd, uint64_t *value)
       *value = reg_read.val;
    return ret == 0;
 }
+
+bool
+intel_gem_supports_protected_context(int fd)
+{
+   struct drm_i915_gem_context_create_ext_setparam recoverable_param = {
+      .param = {
+         .param = I915_CONTEXT_PARAM_RECOVERABLE,
+         .value = false,
+      },
+   };
+   struct drm_i915_gem_context_create_ext_setparam protected_param = {
+      .param = {
+         .param = I915_CONTEXT_PARAM_PROTECTED_CONTENT,
+         .value = true,
+      },
+   };
+   struct drm_i915_gem_context_create_ext create = {
+      .flags = I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS,
+   };
+
+   intel_gem_add_ext(&create.extensions,
+                     I915_CONTEXT_CREATE_EXT_SETPARAM,
+                     &recoverable_param.base);
+   intel_gem_add_ext(&create.extensions,
+                     I915_CONTEXT_CREATE_EXT_SETPARAM,
+                     &protected_param.base);
+
+   int ret = intel_ioctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE_EXT, &create);
+   if (ret == -1)
+      return false;
+
+   struct drm_i915_gem_context_destroy destroy = {
+      .ctx_id = create.ctx_id,
+   };
+   intel_ioctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, &destroy);
+
+   return ret == 0;
+}

diff --git a/src/intel/common/intel_gem.h b/src/intel/common/intel_gem.h
index 66b5639..252f3e3 100644 (file)
--- a/src/intel/common/intel_gem.h
+++ b/src/intel/common/intel_gem.h
@@ -168,4 +168,21 @@ bool intel_gem_read_render_timestamp(int fd, uint64_t *value);
 }
 #endif
 
+bool intel_gem_supports_protected_context(int fd);
+
+static inline void
+intel_gem_add_ext(__u64 *ptr, uint32_t ext_name,
+                  struct i915_user_extension *ext)
+{
+   __u64 *iter = ptr;
+
+   while (*iter != 0) {
+      iter = (__u64 *) &((struct i915_user_extension *)(uintptr_t)*iter)->next_extension;
+   }
+
+   ext->name = ext_name;
+
+   *iter = (uintptr_t) ext;
+}
+
 #endif /* INTEL_GEM_H */

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index b4f9866..337045b 100644 (file)
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -900,6 +900,13 @@ anv_physical_device_try_create(struct vk_instance *vk_instance,
    device->supports_48bit_addresses =
       device->gtt_size > (4ULL << 30 /* GiB */);
 
+   /* We currently only have the right bits for instructions in Gen12+. If the
+    * kernel ever starts supporting that feature on previous generations,
+    * we'll need to edit genxml prior to enabling here.
+    */
+   device->has_protected_contexts = device->info.ver >= 12 &&
+      intel_gem_supports_protected_context(fd);
+
    result = anv_physical_device_init_heaps(device, fd);
    if (result != VK_SUCCESS)
       goto fail_base;

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 4782f68..1eb16d7 100644 (file)
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1013,6 +1013,9 @@ struct anv_physical_device {
      */
     bool                                        has_implicit_ccs;
 
+    /** True if we can create protected contexts. */
+    bool                                        has_protected_contexts;
+
     bool                                        always_flush_cache;
 
     struct {