freedreno/regs: Document CP_MEM_TO_SCRATCH_MEM
authorDanylo Piliaiev <dpiliaiev@igalia.com>
Wed, 5 Jul 2023 13:49:19 +0000 (15:49 +0200)
committerMarge Bot <emma+marge@anholt.net>
Wed, 12 Jul 2023 13:33:27 +0000 (13:33 +0000)
Best guess is that it is a faster way to fetch all the VSC_STATE registers
and keep them in a local scratch memory instead of fetching every time
when skipping IBs.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23881>

src/freedreno/registers/adreno/adreno_pm4.xml

index 0859d10..765dd9e 100644 (file)
@@ -624,7 +624,12 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
        <value name="CP_BV_BR_COUNT_OPS" value="0x1b" variants="A7XX-"/>  <!-- payload 1 or 2 dwords -->
        <!-- similar to CP_CONTEXT_REG_BUNCH, but discards first two dwords?? -->
        <value name="CP_CONTEXT_REG_BUNCH2" value="0x5d" variants="A7XX-"/>
-       <value name="CP_UNK49" value="0x49" variants="A7XX-"/>  <!-- payload 4 dwords, last two address of something -->
+       <doc>
+               Write to a scratch memory that is read by CP_REG_TEST with
+               SOURCE_SCRATCH_MEM set. It's not the same scratch as scratch registers.
+               However it uses the same memory space.
+       </doc>
+       <value name="CP_MEM_TO_SCRATCH_MEM" value="0x49" variants="A7XX-"/>
 
        <doc>
                Executes an array of fixed-size command buffers where each
@@ -1975,6 +1980,27 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
        <reg32 offset="3" name="TIMESTAMP" type="uint"/>
 </domain>
 
+<domain name="CP_MEM_TO_SCRATCH_MEM" width="32">
+       <doc>
+               Best guess is that it is a faster way to fetch all the VSC_STATE registers
+               and keep them in a local scratch memory instead of fetching every time
+               when skipping IBs.
+       </doc>
+       <reg32 offset="0" name="0">
+               <bitfield name="CNT" low="0" high="5" type="uint"/>
+       </reg32>
+       <reg32 offset="1" name="1">
+               <doc>Scratch memory size is 48 dwords`</doc>
+               <bitfield name="OFFSET" low="0" high="5" type="uint"/>
+       </reg32>
+       <reg32 offset="2" name="2">
+               <bitfield name="SRC" low="0" high="31"/>
+       </reg32>
+       <reg32 offset="3" name="3">
+               <bitfield name="SRC_HI" low="0" high="31"/>
+       </reg32>
+</domain>
+
 <domain name="CP_THREAD_CONTROL" width="32">
        <enum name="cp_thread">
                <value name="CP_SET_THREAD_BR" value="1"/>    <!-- Render -->