power: domain: meson-ee-pwrc: add support for the Meson GX SoCs

This syncs with the linux meson-ee-pwrc driver from Linux 5.10-rc1.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c
index 8349a9c..dfedddd 100644 (file)
--- a/drivers/power/domain/meson-ee-pwrc.c
+++ b/drivers/power/domain/meson-ee-pwrc.c
@@ -14,6 +14,7 @@
 #include <reset.h>
 #include <clk.h>
 #include <dt-bindings/power/meson-g12a-power.h>
+#include <dt-bindings/power/meson-gxbb-power.h>
 #include <dt-bindings/power/meson-sm1-power.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
@@ -68,7 +69,7 @@ struct meson_ee_pwrc_domain_data {
 
 /* TOP Power Domains */
 
-static struct meson_ee_pwrc_top_domain g12a_pwrc_vpu = {
+static struct meson_ee_pwrc_top_domain gx_pwrc_vpu = {
        .sleep_reg = AO_RTI_GEN_PWR_SLEEP0,
        .sleep_mask = BIT(8),
        .iso_reg = AO_RTI_GEN_PWR_SLEEP0,
@@ -126,6 +127,12 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = {
        VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
 };
 
+static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = {
+       VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
+       VPU_MEMPD(HHI_VPU_MEM_PD_REG1),
+       VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
+};
+
 static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_eth[] = {
        { HHI_MEM_PD_REG0, GENMASK(3, 2) },
 };
@@ -201,11 +208,17 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = {
 static bool pwrc_ee_get_power(struct power_domain *power_domain);
 
 static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
-       [PWRC_G12A_VPU_ID]  = VPU_PD("VPU", &g12a_pwrc_vpu, g12a_pwrc_mem_vpu,
+       [PWRC_G12A_VPU_ID]  = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu,
                                     pwrc_ee_get_power, 11, 2),
        [PWRC_G12A_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
 };
 
+static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {
+       [PWRC_GXBB_VPU_ID]  = VPU_PD("VPU", &gx_pwrc_vpu, gxbb_pwrc_mem_vpu,
+                       pwrc_ee_get_power, 12, 2),
+       [PWRC_GXBB_ETHERNET_MEM_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth),
+};
+
 static struct meson_ee_pwrc_domain_desc sm1_pwrc_domains[] = {
        [PWRC_SM1_VPU_ID]  = VPU_PD("VPU", &sm1_pwrc_vpu, sm1_pwrc_mem_vpu,
                                    pwrc_ee_get_power, 11, 2),
@@ -369,6 +382,11 @@ static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = {
        .domains = g12a_pwrc_domains,
 };
 
+static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = {
+       .count = ARRAY_SIZE(gxbb_pwrc_domains),
+       .domains = gxbb_pwrc_domains,
+};
+
 static struct meson_ee_pwrc_domain_data meson_ee_sm1_pwrc_data = {
        .count = ARRAY_SIZE(sm1_pwrc_domains),
        .domains = sm1_pwrc_domains,
@@ -380,6 +398,10 @@ static const struct udevice_id meson_ee_pwrc_ids[] = {
                .data = (unsigned long)&meson_ee_g12a_pwrc_data,
        },
        {
+               .compatible = "amlogic,meson-gxbb-pwrc",
+               .data = (unsigned long)&meson_ee_gxbb_pwrc_data,
+       },
+       {
                .compatible = "amlogic,meson-sm1-pwrc",
                .data = (unsigned long)&meson_ee_sm1_pwrc_data,
        },