unsigned input_select_bits = 0;
if (enable) {
- if (read_not_write) {
+ if (read_not_write)
input_select_bits |= Gi_Read_Acknowledges_Irq;
- } else {
+ else
input_select_bits |= Gi_Write_Acknowledges_Irq;
- }
}
ni_tio_set_bits(counter,
NITIO_Gi_Input_Select_Reg(counter->counter_index),
gi_dma_config_bits |= Gi_DMA_Enable_Bit;
gi_dma_config_bits |= Gi_DMA_Int_Bit;
}
- if (read_not_write == 0) {
+ if (read_not_write == 0)
gi_dma_config_bits |= Gi_DMA_Write_Bit;
- }
ni_tio_set_bits(counter,
NITIO_Gi_DMA_Config_Reg(counter->
counter_index),
static int ni_tio_output_cmd(struct ni_gpct *counter,
struct comedi_async *async)
{
- printk("ni_tio: output commands not yet implemented.\n");
+ printk(KERN_ERR "ni_tio: output commands not yet implemented.\n");
return -ENOTSUPP;
counter->mite_chan->dir = COMEDI_OUTPUT;
set_gate_source = 1;
gate_source = cmd->convert_arg;
}
- if (set_gate_source) {
+ if (set_gate_source)
retval = ni_tio_set_gate_src(counter, 0, gate_source);
- }
if (cmd->flags & TRIG_WAKE_EOS) {
ni_tio_set_bits(counter,
NITIO_Gi_Interrupt_Enable_Reg(counter->
spin_lock_irqsave(&counter->lock, flags);
if (counter->mite_chan == NULL) {
- printk
- ("ni_tio: commands only supported with DMA. Interrupt-driven commands not yet implemented.\n");
+ printk(KERN_ERR "ni_tio: commands only supported with DMA. Interrupt-driven commands not yet implemented.\n");
retval = -EIO;
} else {
retval = ni_tio_cmd_setup(counter, async);
if (retval == 0) {
- if (cmd->flags & CMDF_WRITE) {
+ if (cmd->flags & CMDF_WRITE)
retval = ni_tio_output_cmd(counter, async);
- } else {
+ else
retval = ni_tio_input_cmd(counter, async);
- }
}
}
spin_unlock_irqrestore(&counter->lock, flags);
return retval;
}
+EXPORT_SYMBOL_GPL(ni_tio_cmd);
int ni_tio_cmdtest(struct ni_gpct *counter, struct comedi_cmd *cmd)
{
return 0;
}
+EXPORT_SYMBOL_GPL(ni_tio_cmdtest);
int ni_tio_cancel(struct ni_gpct *counter)
{
ni_tio_arm(counter, 0, 0);
spin_lock_irqsave(&counter->lock, flags);
- if (counter->mite_chan) {
+ if (counter->mite_chan)
mite_dma_disarm(counter->mite_chan);
- }
spin_unlock_irqrestore(&counter->lock, flags);
ni_tio_configure_dma(counter, 0, 0);
0x0);
return 0;
}
+EXPORT_SYMBOL_GPL(ni_tio_cancel);
- /* During buffered input counter operation for e-series, the gate interrupt is acked
- automatically by the dma controller, due to the Gi_Read/Write_Acknowledges_IRQ bits
- in the input select register. */
+ /* During buffered input counter operation for e-series, the gate
+ interrupt is acked automatically by the dma controller, due to the
+ Gi_Read/Write_Acknowledges_IRQ bits in the input select register. */
static int should_ack_gate(struct ni_gpct *counter)
{
unsigned long flags;
switch (counter->counter_dev->variant) {
case ni_gpct_variant_m_series:
- case ni_gpct_variant_660x: /* not sure if 660x really supports gate interrupts (the bits are not listed in register-level manual) */
+ /* not sure if 660x really supports gate
+ interrupts (the bits are not listed
+ in register-level manual) */
+ case ni_gpct_variant_660x:
return 1;
break;
case ni_gpct_variant_e_series:
if (gxx_status & Gi_Gate_Error_Bit(counter->counter_index)) {
ack |= Gi_Gate_Error_Confirm_Bit(counter->counter_index);
if (gate_error) {
- /*660x don't support automatic acknowledgement of gate interrupt via dma read/write
+ /*660x don't support automatic acknowledgement
+ of gate interrupt via dma read/write
and report bogus gate errors */
if (counter->counter_dev->variant !=
ni_gpct_variant_660x) {
if (tc_error)
*tc_error = 1;
}
- if (gi_status & Gi_TC_Bit) {
+ if (gi_status & Gi_TC_Bit)
ack |= Gi_TC_Interrupt_Ack_Bit;
- }
if (gi_status & Gi_Gate_Interrupt_Bit) {
if (should_ack_gate(counter))
ack |= Gi_Gate_Interrupt_Ack_Bit;
NITIO_Gxx_Joint_Status2_Reg
(counter->counter_index)) &
Gi_Permanent_Stale_Bit(counter->counter_index)) {
- printk("%s: Gi_Permanent_Stale_Data detected.\n",
- __FUNCTION__);
+ printk(KERN_INFO "%s: Gi_Permanent_Stale_Data detected.\n",
+ __func__);
if (perm_stale_data)
*perm_stale_data = 1;
}
}
}
+EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm);
void ni_tio_handle_interrupt(struct ni_gpct *counter,
struct comedi_subdevice *s)
ni_tio_acknowledge_and_confirm(counter, &gate_error, &tc_error,
&perm_stale_data, NULL);
if (gate_error) {
- printk("%s: Gi_Gate_Error detected.\n", __FUNCTION__);
+ printk(KERN_NOTICE "%s: Gi_Gate_Error detected.\n", __func__);
s->async->events |= COMEDI_CB_OVERFLOW;
}
- if (perm_stale_data) {
+ if (perm_stale_data)
s->async->events |= COMEDI_CB_ERROR;
- }
switch (counter->counter_dev->variant) {
case ni_gpct_variant_m_series:
case ni_gpct_variant_660x:
if (read_register(counter,
- NITIO_Gi_DMA_Status_Reg
- (counter->counter_index)) & Gi_DRQ_Error_Bit)
- {
- printk("%s: Gi_DRQ_Error detected.\n", __FUNCTION__);
+ NITIO_Gi_DMA_Status_Reg
+ (counter->counter_index)) & Gi_DRQ_Error_Bit) {
+ printk(KERN_NOTICE "%s: Gi_DRQ_Error detected.\n",
+ __func__);
s->async->events |= COMEDI_CB_OVERFLOW;
}
break;
mite_sync_input_dma(counter->mite_chan, s->async);
spin_unlock_irqrestore(&counter->lock, flags);
}
+EXPORT_SYMBOL_GPL(ni_tio_handle_interrupt);
void ni_tio_set_mite_channel(struct ni_gpct *counter,
struct mite_channel *mite_chan)
counter->mite_chan = mite_chan;
spin_unlock_irqrestore(&counter->lock, flags);
}
+EXPORT_SYMBOL_GPL(ni_tio_set_mite_channel);
static int __init ni_tiocmd_init_module(void)
{
}
module_exit(ni_tiocmd_cleanup_module);
-
-EXPORT_SYMBOL_GPL(ni_tio_cmd);
-EXPORT_SYMBOL_GPL(ni_tio_cmdtest);
-EXPORT_SYMBOL_GPL(ni_tio_cancel);
-EXPORT_SYMBOL_GPL(ni_tio_handle_interrupt);
-EXPORT_SYMBOL_GPL(ni_tio_set_mite_channel);
-EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm);