platform: fpga/ariane: Remove redundant plic address macros
authorAtish Patra <atish.patra@wdc.com>
Mon, 23 Mar 2020 19:48:55 +0000 (12:48 -0700)
committerAnup Patel <anup@brainfault.org>
Tue, 24 Mar 2020 07:45:52 +0000 (13:15 +0530)
All the common PLIC specific macros are already defined in plic.c.

Remove it from platform code. While at it, Fix the other coding style
issues.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
platform/fpga/ariane/platform.c

index bba04d6..9c13529 100644 (file)
 #define ARIANE_PLIC_NUM_SOURCES                        3
 #define ARIANE_HART_COUNT                      1
 #define ARIANE_CLINT_ADDR 0x2000000
-#define PLIC_ENABLE_BASE               0x2000
-#define PLIC_ENABLE_STRIDE             0x80
-#define PLIC_CONTEXT_BASE              0x200000
-#define PLIC_CONTEXT_STRIDE            0x1000
 
 #define SBI_ARIANE_FEATURES    \
        (SBI_PLATFORM_HAS_TIMER_VALUE | \
@@ -36,7 +32,6 @@
         SBI_PLATFORM_HAS_MCOUNTEREN | \
         SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
 
-
 /*
  * Ariane platform early initialization.
  */
@@ -68,10 +63,10 @@ static int ariane_final_init(bool cold_boot)
 static int ariane_console_init(void)
 {
        return uart8250_init(ARIANE_UART_ADDR,
-                                                ARIANE_UART_FREQ,
-                                                ARIANE_UART_BAUDRATE,
-                                               ARIANE_UART_REG_SHIFT,
-                                               ARIANE_UART_REG_WIDTH);
+                            ARIANE_UART_FREQ,
+                            ARIANE_UART_BAUDRATE,
+                            ARIANE_UART_REG_SHIFT,
+                            ARIANE_UART_REG_WIDTH);
 }
 
 static int plic_ariane_warm_irqchip_init(u32 target_hart,