* config/tc-mips.c (mips_cpu_info_table): Move the MIPS64r2

comment so that Broadcom SB-1 cores are in the MIPS64 section.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d1cc84d..53a803f 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2008-10-24  Maciej W. Rozycki  <macro@linux-mips.org>
+
+       * config/tc-mips.c (mips_cpu_info_table): Move the MIPS64r2
+       comment so that Broadcom SB-1 cores are in the MIPS64 section.
+
 2008-10-21  Alan Modra  <amodra@bigpond.net.au>
 
        * config/tc-bfin.c (gencode, allocate): Remove unnecessary cast.

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index b7eddc9..5c65384 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -15163,8 +15163,6 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   { "20kc",           MIPS_CPU_ASE_MIPS3D,     ISA_MIPS64,     CPU_MIPS64 },
   { "25kf",           MIPS_CPU_ASE_MIPS3D,     ISA_MIPS64,     CPU_MIPS64 },
 
-  /* MIPS 64 Release 2 */
-
   /* Broadcom SB-1 CPU core */
   { "sb1",            MIPS_CPU_ASE_MIPS3D | MIPS_CPU_ASE_MDMX,
                                                ISA_MIPS64,     CPU_SB1 },
@@ -15172,6 +15170,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   { "sb1a",           MIPS_CPU_ASE_MIPS3D | MIPS_CPU_ASE_MDMX,
                                                ISA_MIPS64,     CPU_SB1 },
 
+  /* MIPS 64 Release 2 */
+
   /* Cavium Networks Octeon CPU core */
   { "octeon",        0,      ISA_MIPS64R2,   CPU_OCTEON },